{"title":"串并联开关电容耦合电感直流-交流逆变器的建模与实现","authors":"Yuen-Haw Chang, Zheng-Bin Li","doi":"10.1145/3384613.3384616","DOIUrl":null,"url":null,"abstract":"The modeling and implementation of a serial-parallel-switched-capacitor coupled-inductor inverter (SPSCCI) is presented by incorporating sinusoidal pulse-width-modulation-based (SPWM) controller for realizing high-gain DC-AC conversion/closed-loop regulation. Its power part consists of 2 cascaded blocks: SPSCCI booster (coupled inductor with turn ratio n, 4 pumping capacitors, 5 switches) and half-bridge DC-link (HBDL) inverter (2 bridge capacitors, 2 switches), so as to boost a voltage gain range into: +0.5[4(n+1) + (nD + 1)/(1-D)] ~ 0.5[4(n+1)+(nD + 1)/(1-D)] (D: ratio cycle). When n = 4, D = 0.5, AC output can be boosted into +13~13 times voltage of DC supply. Its control part consists of an SPWM compensator and a phase generator, implemented mainly on a full-custom chip: D35-105B-E0008, TSMC 0.35μm 2P4M, 1500μm×1500μm, 5V, 2.68mW, max. 200kHz. Here, the related modeling and analysis are discussed. Finally, the simulation/experiment results of SPSCCI are presented and verified on a prototype board to demonstrate the practicality of this scheme.","PeriodicalId":214098,"journal":{"name":"Proceedings of the 2020 12th International Conference on Computer and Automation Engineering","volume":"466 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-02-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Modeling and Implementation of Serial-Parallel-Switched-Capacitor Coupled-Inductor DC-AC Inverter\",\"authors\":\"Yuen-Haw Chang, Zheng-Bin Li\",\"doi\":\"10.1145/3384613.3384616\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The modeling and implementation of a serial-parallel-switched-capacitor coupled-inductor inverter (SPSCCI) is presented by incorporating sinusoidal pulse-width-modulation-based (SPWM) controller for realizing high-gain DC-AC conversion/closed-loop regulation. Its power part consists of 2 cascaded blocks: SPSCCI booster (coupled inductor with turn ratio n, 4 pumping capacitors, 5 switches) and half-bridge DC-link (HBDL) inverter (2 bridge capacitors, 2 switches), so as to boost a voltage gain range into: +0.5[4(n+1) + (nD + 1)/(1-D)] ~ 0.5[4(n+1)+(nD + 1)/(1-D)] (D: ratio cycle). When n = 4, D = 0.5, AC output can be boosted into +13~13 times voltage of DC supply. Its control part consists of an SPWM compensator and a phase generator, implemented mainly on a full-custom chip: D35-105B-E0008, TSMC 0.35μm 2P4M, 1500μm×1500μm, 5V, 2.68mW, max. 200kHz. Here, the related modeling and analysis are discussed. Finally, the simulation/experiment results of SPSCCI are presented and verified on a prototype board to demonstrate the practicality of this scheme.\",\"PeriodicalId\":214098,\"journal\":{\"name\":\"Proceedings of the 2020 12th International Conference on Computer and Automation Engineering\",\"volume\":\"466 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-02-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 2020 12th International Conference on Computer and Automation Engineering\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/3384613.3384616\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 2020 12th International Conference on Computer and Automation Engineering","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/3384613.3384616","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Modeling and Implementation of Serial-Parallel-Switched-Capacitor Coupled-Inductor DC-AC Inverter
The modeling and implementation of a serial-parallel-switched-capacitor coupled-inductor inverter (SPSCCI) is presented by incorporating sinusoidal pulse-width-modulation-based (SPWM) controller for realizing high-gain DC-AC conversion/closed-loop regulation. Its power part consists of 2 cascaded blocks: SPSCCI booster (coupled inductor with turn ratio n, 4 pumping capacitors, 5 switches) and half-bridge DC-link (HBDL) inverter (2 bridge capacitors, 2 switches), so as to boost a voltage gain range into: +0.5[4(n+1) + (nD + 1)/(1-D)] ~ 0.5[4(n+1)+(nD + 1)/(1-D)] (D: ratio cycle). When n = 4, D = 0.5, AC output can be boosted into +13~13 times voltage of DC supply. Its control part consists of an SPWM compensator and a phase generator, implemented mainly on a full-custom chip: D35-105B-E0008, TSMC 0.35μm 2P4M, 1500μm×1500μm, 5V, 2.68mW, max. 200kHz. Here, the related modeling and analysis are discussed. Finally, the simulation/experiment results of SPSCCI are presented and verified on a prototype board to demonstrate the practicality of this scheme.