J. Palma, C. Marcon, Fabiano Hessel, E. Bezerra, Guilherme Rohde, L. Azevedo, C. Reif, C. Metzler
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This paper describes the implementation of a passive RFID tag targeting low power implementation, which works on 915 MHz UHF frequency. The proposed architecture allows customizing the command sets implemented inside its digital block, according to the target application needs, saving area and reducing power consumption. A flexible design flow is proposed for the customization, verification and synthesis of the digital block, targeting low power requirements.
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