{"title":"工作电压为1v, s /s为20ms /s, s /N为57db,电流模式CMOS采样保持IC","authors":"Y. Sugimoto","doi":"10.1109/VLSIC.2001.934240","DOIUrl":null,"url":null,"abstract":"A 1 V operational, 20 MS/s MOS sample-and-hold IC, which is applicable to video signal processing, has been developed. The signal-to-noise ratio (SNR) reached 57 dB under the application of +200 μA of differential input signal current at a 1 MHz frequency. The fabrication process was 0.35 μm CMOS with a threshold voltage of +0.35 V for an NMOS device and -0.35 V for a PMOS device.","PeriodicalId":346869,"journal":{"name":"2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"A 1 V operational, 20 MS/s and 57 dB of S/N, current-mode CMOS sample-and-hold IC\",\"authors\":\"Y. Sugimoto\",\"doi\":\"10.1109/VLSIC.2001.934240\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 1 V operational, 20 MS/s MOS sample-and-hold IC, which is applicable to video signal processing, has been developed. The signal-to-noise ratio (SNR) reached 57 dB under the application of +200 μA of differential input signal current at a 1 MHz frequency. The fabrication process was 0.35 μm CMOS with a threshold voltage of +0.35 V for an NMOS device and -0.35 V for a PMOS device.\",\"PeriodicalId\":346869,\"journal\":{\"name\":\"2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185)\",\"volume\":\"16 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2001-06-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIC.2001.934240\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2001.934240","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 1 V operational, 20 MS/s and 57 dB of S/N, current-mode CMOS sample-and-hold IC
A 1 V operational, 20 MS/s MOS sample-and-hold IC, which is applicable to video signal processing, has been developed. The signal-to-noise ratio (SNR) reached 57 dB under the application of +200 μA of differential input signal current at a 1 MHz frequency. The fabrication process was 0.35 μm CMOS with a threshold voltage of +0.35 V for an NMOS device and -0.35 V for a PMOS device.