{"title":"3-5 GHz 0.18μm CMOS低噪声放大器,适用于超宽带应用","authors":"V. Bhale, U. Dalal, R. Patrikar","doi":"10.1109/ICDCSYST.2014.6926201","DOIUrl":null,"url":null,"abstract":"A two-stage Ultra-Wide-Band (UWB) CMOS low noise amplifier (LNA) employing RC feedback on conventional cascode inductive source degeneration structure is presented in this paper. The proposed LNA is designed using 0.18 μm radio frequency (RF) CMOS technology for a 3 to 5 GHz ultra-wide-band system. By careful optimization, an RC feedback circuit acts as a current reused topology, while second stage used is a simple common source topology to improve gain and its flatness for 3 to 5 GHz band. The designed single stage LNA has a power gain of 12.7 dB, input return loss of <; -6 dB, output return loss of <; -8 dB, reverse isolation of <; -26.8 dB, noise figure of 2.31 dB and one dB compression (P1dB) of -6.46719 dBm at 4 GHz, while consuming 11.7 mW of DC dissipation at a 1.8 V supply voltage. The another topology uses a common source (CS) as second stage to boost the gain up to 22 dB, thereby maintaining gain flatness over 3-5 GHz band and an improved isolation of <; -40 dB is achieved. The output and input return losses are <; -10 dB respectively for desired band with the compromise of power consumption of 12.5 mW. The stability analysis also shows that the designed LNA is un-conditionally stable and found to maintain good linearity.","PeriodicalId":252016,"journal":{"name":"2014 2nd International Conference on Devices, Circuits and Systems (ICDCS)","volume":"93 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A high stability and excellent gain flatness 3–5 GHz 0.18μm CMOS low noise amplifier for ultra-wide-band applications\",\"authors\":\"V. Bhale, U. Dalal, R. Patrikar\",\"doi\":\"10.1109/ICDCSYST.2014.6926201\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A two-stage Ultra-Wide-Band (UWB) CMOS low noise amplifier (LNA) employing RC feedback on conventional cascode inductive source degeneration structure is presented in this paper. The proposed LNA is designed using 0.18 μm radio frequency (RF) CMOS technology for a 3 to 5 GHz ultra-wide-band system. By careful optimization, an RC feedback circuit acts as a current reused topology, while second stage used is a simple common source topology to improve gain and its flatness for 3 to 5 GHz band. The designed single stage LNA has a power gain of 12.7 dB, input return loss of <; -6 dB, output return loss of <; -8 dB, reverse isolation of <; -26.8 dB, noise figure of 2.31 dB and one dB compression (P1dB) of -6.46719 dBm at 4 GHz, while consuming 11.7 mW of DC dissipation at a 1.8 V supply voltage. The another topology uses a common source (CS) as second stage to boost the gain up to 22 dB, thereby maintaining gain flatness over 3-5 GHz band and an improved isolation of <; -40 dB is achieved. The output and input return losses are <; -10 dB respectively for desired band with the compromise of power consumption of 12.5 mW. The stability analysis also shows that the designed LNA is un-conditionally stable and found to maintain good linearity.\",\"PeriodicalId\":252016,\"journal\":{\"name\":\"2014 2nd International Conference on Devices, Circuits and Systems (ICDCS)\",\"volume\":\"93 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-03-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 2nd International Conference on Devices, Circuits and Systems (ICDCS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICDCSYST.2014.6926201\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 2nd International Conference on Devices, Circuits and Systems (ICDCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICDCSYST.2014.6926201","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A high stability and excellent gain flatness 3–5 GHz 0.18μm CMOS low noise amplifier for ultra-wide-band applications
A two-stage Ultra-Wide-Band (UWB) CMOS low noise amplifier (LNA) employing RC feedback on conventional cascode inductive source degeneration structure is presented in this paper. The proposed LNA is designed using 0.18 μm radio frequency (RF) CMOS technology for a 3 to 5 GHz ultra-wide-band system. By careful optimization, an RC feedback circuit acts as a current reused topology, while second stage used is a simple common source topology to improve gain and its flatness for 3 to 5 GHz band. The designed single stage LNA has a power gain of 12.7 dB, input return loss of <; -6 dB, output return loss of <; -8 dB, reverse isolation of <; -26.8 dB, noise figure of 2.31 dB and one dB compression (P1dB) of -6.46719 dBm at 4 GHz, while consuming 11.7 mW of DC dissipation at a 1.8 V supply voltage. The another topology uses a common source (CS) as second stage to boost the gain up to 22 dB, thereby maintaining gain flatness over 3-5 GHz band and an improved isolation of <; -40 dB is achieved. The output and input return losses are <; -10 dB respectively for desired band with the compromise of power consumption of 12.5 mW. The stability analysis also shows that the designed LNA is un-conditionally stable and found to maintain good linearity.