基于故障仿真的顺序电路设计错误诊断

Shi-Yu Huang, K. Cheng, Kuang-Chien Chen, J. Lu
{"title":"基于故障仿真的顺序电路设计错误诊断","authors":"Shi-Yu Huang, K. Cheng, Kuang-Chien Chen, J. Lu","doi":"10.1109/DAC.1998.724548","DOIUrl":null,"url":null,"abstract":"This paper addresses the problem of locating design errors in a sequential circuit. For single-error circuits, we consider a signal f as a potential error source only if the circuit can be completely rectified by re-synthesizing f (i.e., changing the function of signal f). In order to handle larger circuits, we do not rely on Binary Decision Diagram. Instead, we search for potential error sources by a modified sequential fault simulation process. The main contributions of this paper are two-fold: (1) we derive the necessary and sufficient condition of whether an erroneous input sequence (i.e., an input sequence producing erroneous responses) can be corrected by changing the function of a particular internal signal; and (2) we propose a modified fault simulation procedure to check this condition. Our approach does not rely on any error model, and thus, is suitable for general types of errors. Furthermore, it can be easily extended to identify multiple errors. Experimental results on ISCAS89 benchmark circuits are presented to demonstrate its capability.","PeriodicalId":221221,"journal":{"name":"Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"32","resultStr":"{\"title\":\"Fault-simulation based design error diagnosis for sequential circuits\",\"authors\":\"Shi-Yu Huang, K. Cheng, Kuang-Chien Chen, J. Lu\",\"doi\":\"10.1109/DAC.1998.724548\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper addresses the problem of locating design errors in a sequential circuit. For single-error circuits, we consider a signal f as a potential error source only if the circuit can be completely rectified by re-synthesizing f (i.e., changing the function of signal f). In order to handle larger circuits, we do not rely on Binary Decision Diagram. Instead, we search for potential error sources by a modified sequential fault simulation process. The main contributions of this paper are two-fold: (1) we derive the necessary and sufficient condition of whether an erroneous input sequence (i.e., an input sequence producing erroneous responses) can be corrected by changing the function of a particular internal signal; and (2) we propose a modified fault simulation procedure to check this condition. Our approach does not rely on any error model, and thus, is suitable for general types of errors. Furthermore, it can be easily extended to identify multiple errors. Experimental results on ISCAS89 benchmark circuits are presented to demonstrate its capability.\",\"PeriodicalId\":221221,\"journal\":{\"name\":\"Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175)\",\"volume\":\"43 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1998-05-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"32\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DAC.1998.724548\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DAC.1998.724548","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 32

摘要

本文研究顺序电路中设计误差的定位问题。对于单错误电路,只有当电路可以通过重新合成f(即改变信号f的函数)完全整流时,我们才将信号f视为潜在的错误源。为了处理更大的电路,我们不依赖于二元决策图。相反,我们通过改进的顺序故障模拟过程来搜索潜在的错误源。本文的主要贡献有两个方面:(1)我们推导了错误输入序列(即产生错误响应的输入序列)是否可以通过改变特定内部信号的函数来纠正的充分必要条件;(2)提出了一种改进的故障模拟程序来检验这种情况。我们的方法不依赖于任何错误模型,因此适用于一般类型的错误。此外,它可以很容易地扩展到识别多个错误。在ISCAS89基准电路上的实验结果验证了其性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Fault-simulation based design error diagnosis for sequential circuits
This paper addresses the problem of locating design errors in a sequential circuit. For single-error circuits, we consider a signal f as a potential error source only if the circuit can be completely rectified by re-synthesizing f (i.e., changing the function of signal f). In order to handle larger circuits, we do not rely on Binary Decision Diagram. Instead, we search for potential error sources by a modified sequential fault simulation process. The main contributions of this paper are two-fold: (1) we derive the necessary and sufficient condition of whether an erroneous input sequence (i.e., an input sequence producing erroneous responses) can be corrected by changing the function of a particular internal signal; and (2) we propose a modified fault simulation procedure to check this condition. Our approach does not rely on any error model, and thus, is suitable for general types of errors. Furthermore, it can be easily extended to identify multiple errors. Experimental results on ISCAS89 benchmark circuits are presented to demonstrate its capability.
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