{"title":"雷达信号模拟器的实现","authors":"Fuyang Zhang, Jun Wang, Yuxian Zhang, Pei Wang","doi":"10.1109/ITIME.2011.6132110","DOIUrl":null,"url":null,"abstract":"This article describes a variety of FPGA-based radar signal generator. This system is connected to the host, binding data from the software interface, through the PCI bus transfer stored in the system. Within the FPGA to achieve DDS signal generator, and finally through the digital-analog converter output. Finally, the system resource utilization and the actual results are given.","PeriodicalId":170838,"journal":{"name":"2011 IEEE International Symposium on IT in Medicine and Education","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"The implementation of radar signal simulator\",\"authors\":\"Fuyang Zhang, Jun Wang, Yuxian Zhang, Pei Wang\",\"doi\":\"10.1109/ITIME.2011.6132110\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This article describes a variety of FPGA-based radar signal generator. This system is connected to the host, binding data from the software interface, through the PCI bus transfer stored in the system. Within the FPGA to achieve DDS signal generator, and finally through the digital-analog converter output. Finally, the system resource utilization and the actual results are given.\",\"PeriodicalId\":170838,\"journal\":{\"name\":\"2011 IEEE International Symposium on IT in Medicine and Education\",\"volume\":\"9 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 IEEE International Symposium on IT in Medicine and Education\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ITIME.2011.6132110\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE International Symposium on IT in Medicine and Education","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ITIME.2011.6132110","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This article describes a variety of FPGA-based radar signal generator. This system is connected to the host, binding data from the software interface, through the PCI bus transfer stored in the system. Within the FPGA to achieve DDS signal generator, and finally through the digital-analog converter output. Finally, the system resource utilization and the actual results are given.
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