{"title":"超低功耗22nm自振荡电压倍频器与动态漏阻逻辑","authors":"Sora Kato, Guowei Chen, K. Niitsu","doi":"10.1109/LASCAS53948.2022.9789081","DOIUrl":null,"url":null,"abstract":"This paper presents a new structure of a self-oscillating voltage doubler (SOVD) that has a very low power. In the proposed SOVD structure, the inverters present in the old structure of an SOVD are replaced with a dynamic leakage-suppression logic inverter to reduce power consumption. When simulated under the condition of an input voltage of 300 $\\mathbf{mV}$, the leakage current and oscillation frequency can be reduced, resulting in extremely low power consumption. The input voltage conversion efficiency was 89.5%. The power efficiency was about 7 times higher than that of a conventional SOVD.","PeriodicalId":356481,"journal":{"name":"2022 IEEE 13th Latin America Symposium on Circuits and System (LASCAS)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"An Ultra-Low Power 22 nm Self-Oscillating Voltage Doubler With Dynamic Leakage-Suppression Logic\",\"authors\":\"Sora Kato, Guowei Chen, K. Niitsu\",\"doi\":\"10.1109/LASCAS53948.2022.9789081\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a new structure of a self-oscillating voltage doubler (SOVD) that has a very low power. In the proposed SOVD structure, the inverters present in the old structure of an SOVD are replaced with a dynamic leakage-suppression logic inverter to reduce power consumption. When simulated under the condition of an input voltage of 300 $\\\\mathbf{mV}$, the leakage current and oscillation frequency can be reduced, resulting in extremely low power consumption. The input voltage conversion efficiency was 89.5%. The power efficiency was about 7 times higher than that of a conventional SOVD.\",\"PeriodicalId\":356481,\"journal\":{\"name\":\"2022 IEEE 13th Latin America Symposium on Circuits and System (LASCAS)\",\"volume\":\"7 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-03-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE 13th Latin America Symposium on Circuits and System (LASCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/LASCAS53948.2022.9789081\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE 13th Latin America Symposium on Circuits and System (LASCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/LASCAS53948.2022.9789081","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An Ultra-Low Power 22 nm Self-Oscillating Voltage Doubler With Dynamic Leakage-Suppression Logic
This paper presents a new structure of a self-oscillating voltage doubler (SOVD) that has a very low power. In the proposed SOVD structure, the inverters present in the old structure of an SOVD are replaced with a dynamic leakage-suppression logic inverter to reduce power consumption. When simulated under the condition of an input voltage of 300 $\mathbf{mV}$, the leakage current and oscillation frequency can be reduced, resulting in extremely low power consumption. The input voltage conversion efficiency was 89.5%. The power efficiency was about 7 times higher than that of a conventional SOVD.