异步Sigma-Delta调制器的可配置迟滞比较器

2018 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC) Pub Date : 2018-10-01 DOI:10.1109/NORCHIP.2018.8573454

Olaitan Olabode, Vishnu Unnikrishnan, Ilia Kempi, A. Hammer, M. Kosunen, J. Ryynänen

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摘要

本文介绍了一种用于异步σ - δ调制器(ASDM)的可配置迟滞比较器。所建议的比较器为配置环路延迟和ASDM的频率提供了粗调和精调选项。在28 nm FDSOI工艺中实现的比较器的布局后仿真表明，比较器的滞后电压范围为±(1 ~ 15.3)mV，在0.7 V电源下消耗36.8 nW ~ 4.4 μW，可在100 kHz ~ 6 MHz范围内配置ASDM中心频率。

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A Configurable Hysteresis Comparator for Asynchronous Sigma-Delta Modulators

This paper describes a configurable hysteresis comparator for asynchronous sigma-delta modulators (ASDM). The proposed comparator provides coarse and fine tuning options for configuring the loop delay and hence the frequency of an ASDM. The post-layout simulation of the comparator implemented in a 28 nm FDSOI process shows that the comparator provides hysteresis voltage range of ±(1 to 15.3) mV while consuming 36.8 nW to 4.4 μW from 0.7 V supply, which enables configurable ASDM center-frequency in the range of 100 kHz to 6 MHz.

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2018 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC)

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