{"title":"采用0.8 /spl mu/m硅双极生产技术的低功耗15ghz分频器","authors":"H. Knapp, W. Wilhelm, M. Wurzer","doi":"10.1109/RFIC.1999.805237","DOIUrl":null,"url":null,"abstract":"A low power static frequency divider with a divide ratio of 8 operating up to 15 GHz while consuming only 22 mA from a 3.6 V to 6 V supply is presented. It is manufactured in a conventional 0.8 /spl mu/m silicon bipolar technology with a cut-off frequency of 25 GHz. The chip is mounted in a SOT363 package.","PeriodicalId":447109,"journal":{"name":"1999 IEEE Radio Frequency Integrated Circuits Symposium (Cat No.99CH37001)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"A low power 15 GHz frequency divider in a 0.8 /spl mu/m silicon bipolar production technology\",\"authors\":\"H. Knapp, W. Wilhelm, M. Wurzer\",\"doi\":\"10.1109/RFIC.1999.805237\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A low power static frequency divider with a divide ratio of 8 operating up to 15 GHz while consuming only 22 mA from a 3.6 V to 6 V supply is presented. It is manufactured in a conventional 0.8 /spl mu/m silicon bipolar technology with a cut-off frequency of 25 GHz. The chip is mounted in a SOT363 package.\",\"PeriodicalId\":447109,\"journal\":{\"name\":\"1999 IEEE Radio Frequency Integrated Circuits Symposium (Cat No.99CH37001)\",\"volume\":\"15 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1999-06-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1999 IEEE Radio Frequency Integrated Circuits Symposium (Cat No.99CH37001)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIC.1999.805237\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1999 IEEE Radio Frequency Integrated Circuits Symposium (Cat No.99CH37001)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.1999.805237","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A low power 15 GHz frequency divider in a 0.8 /spl mu/m silicon bipolar production technology
A low power static frequency divider with a divide ratio of 8 operating up to 15 GHz while consuming only 22 mA from a 3.6 V to 6 V supply is presented. It is manufactured in a conventional 0.8 /spl mu/m silicon bipolar technology with a cut-off frequency of 25 GHz. The chip is mounted in a SOT363 package.