A 100 MHz timing generator for impulse radio applications

The timing generator is used to generate a 100 MHz timing signal for impulse radio system with timing resolution of 19.5 ps controlled by 9-bit digital input. A fine phase interpolator is used to generate one of the 32 interpolated phases by using common gate buffered switch techniques. The timing generator achieves /spl plusmn/0.3LSB differential nonlinearity and /spl plusmn/2LSB integral nonlinearity. The chip is fabricated in a standard 0.35 /spl mu/m CMOS process and consumes 55 mW power from a 3 V supply. The chip area including pads occupies 1.5/spl times/1.5 mm/sup 2/.