{"title":"并行MPEG-2视频编码器","authors":"R. Sachdeva, K. Saha","doi":"10.1109/ICCE.2011.5722515","DOIUrl":null,"url":null,"abstract":"In this paper we present a unique approach towards parallelizing the Software MPEG-2 Video Encoder. The approach involves the division of encoding process spatially, between four similar processors with distributed memory system, in such a way that each frame of the input video sequence is divided into four separate sections, each individually processed by a processor. The results thus produced were compared with those of the Sequential Encoder for a number of different input bitstreams and a speedup in the range of 3 to 3.5 with four processors was successfully obtained.","PeriodicalId":256368,"journal":{"name":"2011 IEEE International Conference on Consumer Electronics (ICCE)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-03-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Parallel MPEG-2 Video Encoder\",\"authors\":\"R. Sachdeva, K. Saha\",\"doi\":\"10.1109/ICCE.2011.5722515\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper we present a unique approach towards parallelizing the Software MPEG-2 Video Encoder. The approach involves the division of encoding process spatially, between four similar processors with distributed memory system, in such a way that each frame of the input video sequence is divided into four separate sections, each individually processed by a processor. The results thus produced were compared with those of the Sequential Encoder for a number of different input bitstreams and a speedup in the range of 3 to 3.5 with four processors was successfully obtained.\",\"PeriodicalId\":256368,\"journal\":{\"name\":\"2011 IEEE International Conference on Consumer Electronics (ICCE)\",\"volume\":\"9 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-03-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 IEEE International Conference on Consumer Electronics (ICCE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCE.2011.5722515\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE International Conference on Consumer Electronics (ICCE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCE.2011.5722515","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
In this paper we present a unique approach towards parallelizing the Software MPEG-2 Video Encoder. The approach involves the division of encoding process spatially, between four similar processors with distributed memory system, in such a way that each frame of the input video sequence is divided into four separate sections, each individually processed by a processor. The results thus produced were compared with those of the Sequential Encoder for a number of different input bitstreams and a speedup in the range of 3 to 3.5 with four processors was successfully obtained.
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