{"title":"QFN封装的模垫分层","authors":"C. Chiew, Paing Samsun, L. Vigneswaran, A. Ang","doi":"10.1109/IEMT.2018.8511797","DOIUrl":null,"url":null,"abstract":"There are many QFN packaged ICs with different die pad design widely used in semiconductor industry. With minimum delta on die pad size and chip size ratio, this will continue maximize the package functionality in same package size, yet attractive cost packaged ICs. However, a different die pad size to chip ratio lead to different stress level to building part which resulted different delamination level in package. Not to miss out the stress created by manufacturing process with its tool construction which cause delamination to package in addition. In general, there are 2 types of stress; tensile stress and shear stress. It is easy to tackle the stress related delamination to mechanical faulty compare to thermal induced stress. The root cause of thermal induced stress may involve more than one heat treatment's processes imposed on ICs manufacturing line. A change of package design or bill of material (BOM) may be incurred to overcome the delamination due to thermal resulted stress. In this paper, a thermal simulation was carried out firstly on affected package design impacted with die pad delamination. The result confirms that high thermal stress was localised on affected die pad area with addition high warpage observed. This was lead to improvement activities on warpage, which was caused by different heat treatment process. A statistical study on warpage behaviour was conducted to different heat treatment process (die bonded, wire bonded and mold process). Result showed that die pad delamination was related to high heat treatment process at die attached process. To prove the failure mechanism, different heat treatment temperature on die attached was statistically studied. Data was proven that die pad delamination eliminated by low heat temperature in die attached process. To make a success on die pad delamination elimination, a replacement from solder paste to glue material (same CTE as solder paste) is required during die attached process with low heat treatment temperature. After building part, glue designed into package with die attached process characterization, no die pad delamination found. With the big scale production confirmation, low heat temperature at die attached process is a proven solution on die pad delamination in success for affected package.","PeriodicalId":292144,"journal":{"name":"2018 IEEE 38th International Electronics Manufacturing Technology Conference (IEMT)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Die Pad Delamination on QFN Package\",\"authors\":\"C. Chiew, Paing Samsun, L. Vigneswaran, A. Ang\",\"doi\":\"10.1109/IEMT.2018.8511797\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"There are many QFN packaged ICs with different die pad design widely used in semiconductor industry. With minimum delta on die pad size and chip size ratio, this will continue maximize the package functionality in same package size, yet attractive cost packaged ICs. However, a different die pad size to chip ratio lead to different stress level to building part which resulted different delamination level in package. Not to miss out the stress created by manufacturing process with its tool construction which cause delamination to package in addition. In general, there are 2 types of stress; tensile stress and shear stress. It is easy to tackle the stress related delamination to mechanical faulty compare to thermal induced stress. The root cause of thermal induced stress may involve more than one heat treatment's processes imposed on ICs manufacturing line. A change of package design or bill of material (BOM) may be incurred to overcome the delamination due to thermal resulted stress. In this paper, a thermal simulation was carried out firstly on affected package design impacted with die pad delamination. The result confirms that high thermal stress was localised on affected die pad area with addition high warpage observed. This was lead to improvement activities on warpage, which was caused by different heat treatment process. A statistical study on warpage behaviour was conducted to different heat treatment process (die bonded, wire bonded and mold process). Result showed that die pad delamination was related to high heat treatment process at die attached process. To prove the failure mechanism, different heat treatment temperature on die attached was statistically studied. Data was proven that die pad delamination eliminated by low heat temperature in die attached process. To make a success on die pad delamination elimination, a replacement from solder paste to glue material (same CTE as solder paste) is required during die attached process with low heat treatment temperature. After building part, glue designed into package with die attached process characterization, no die pad delamination found. With the big scale production confirmation, low heat temperature at die attached process is a proven solution on die pad delamination in success for affected package.\",\"PeriodicalId\":292144,\"journal\":{\"name\":\"2018 IEEE 38th International Electronics Manufacturing Technology Conference (IEMT)\",\"volume\":\"45 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 IEEE 38th International Electronics Manufacturing Technology Conference (IEMT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEMT.2018.8511797\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE 38th International Electronics Manufacturing Technology Conference (IEMT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEMT.2018.8511797","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
There are many QFN packaged ICs with different die pad design widely used in semiconductor industry. With minimum delta on die pad size and chip size ratio, this will continue maximize the package functionality in same package size, yet attractive cost packaged ICs. However, a different die pad size to chip ratio lead to different stress level to building part which resulted different delamination level in package. Not to miss out the stress created by manufacturing process with its tool construction which cause delamination to package in addition. In general, there are 2 types of stress; tensile stress and shear stress. It is easy to tackle the stress related delamination to mechanical faulty compare to thermal induced stress. The root cause of thermal induced stress may involve more than one heat treatment's processes imposed on ICs manufacturing line. A change of package design or bill of material (BOM) may be incurred to overcome the delamination due to thermal resulted stress. In this paper, a thermal simulation was carried out firstly on affected package design impacted with die pad delamination. The result confirms that high thermal stress was localised on affected die pad area with addition high warpage observed. This was lead to improvement activities on warpage, which was caused by different heat treatment process. A statistical study on warpage behaviour was conducted to different heat treatment process (die bonded, wire bonded and mold process). Result showed that die pad delamination was related to high heat treatment process at die attached process. To prove the failure mechanism, different heat treatment temperature on die attached was statistically studied. Data was proven that die pad delamination eliminated by low heat temperature in die attached process. To make a success on die pad delamination elimination, a replacement from solder paste to glue material (same CTE as solder paste) is required during die attached process with low heat treatment temperature. After building part, glue designed into package with die attached process characterization, no die pad delamination found. With the big scale production confirmation, low heat temperature at die attached process is a proven solution on die pad delamination in success for affected package.