Niu Jin, A. T. Rice, Paul R. Berger, P. Thompson, P. Chi, D. Simons
{"title":"掺p Si/SiGe谐振带间隧道二极管的SiGe扩散势垒","authors":"Niu Jin, A. T. Rice, Paul R. Berger, P. Thompson, P. Chi, D. Simons","doi":"10.1109/LECHPD.2002.1146762","DOIUrl":null,"url":null,"abstract":"Si/SiGe resonant interband tunnel diodes (RITD) employing /spl delta/-doping spikes of P and B that demonstrate negative differential resistance (NDR) at room temperature are presented. Thin SiGe layers sandwiching the B /spl delta/-doping spike used to suppress B out-diffusion are discussed. Three structures were investigated in this study. Structure A, which employed a symmetrical 1 nm Si /4 nm Si/sub 0.6/Ge/sub 0.4//1 nm Si (1/4/1) spacer, showed a peak-to-valley current ratio (PVCR) of 2.7 after 1 minute annealing at 725/spl deg/C. Structure B with an asymmetrical 0 nm Si/4 nm Si/sub 0.6/Ge/sub 0.4//2 nm Si (0/4/2) spacer configuration showed a PVCR of 3.2 after 1 minute annealing at 800/spl deg/C. Structure C, which is the same as Structure B, except that a 1 nm Si/sub 0.6/Ge/sub 0.4/ cladding layer was grown below the B /spl delta/-layer, further improved PVCR to 3.6 after 1 minute annealing at 825/spl deg/C. Results clearly show that, by introducing SiGe layers to clad the B delta-doping layer, the B diffusion is suppressed during the post growth annealing, which raises the thermal budget. A higher RTA temperature appears to be more effective in eliminating defects and results in a lower valley current and higher PVCR.","PeriodicalId":137839,"journal":{"name":"Proceedings. IEEE Lester Eastman Conference on High Performance Devices","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"SiGe diffusion barriers for P-doped Si/SiGe resonant interband tunnel diodes\",\"authors\":\"Niu Jin, A. T. Rice, Paul R. Berger, P. Thompson, P. Chi, D. Simons\",\"doi\":\"10.1109/LECHPD.2002.1146762\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Si/SiGe resonant interband tunnel diodes (RITD) employing /spl delta/-doping spikes of P and B that demonstrate negative differential resistance (NDR) at room temperature are presented. Thin SiGe layers sandwiching the B /spl delta/-doping spike used to suppress B out-diffusion are discussed. Three structures were investigated in this study. Structure A, which employed a symmetrical 1 nm Si /4 nm Si/sub 0.6/Ge/sub 0.4//1 nm Si (1/4/1) spacer, showed a peak-to-valley current ratio (PVCR) of 2.7 after 1 minute annealing at 725/spl deg/C. Structure B with an asymmetrical 0 nm Si/4 nm Si/sub 0.6/Ge/sub 0.4//2 nm Si (0/4/2) spacer configuration showed a PVCR of 3.2 after 1 minute annealing at 800/spl deg/C. Structure C, which is the same as Structure B, except that a 1 nm Si/sub 0.6/Ge/sub 0.4/ cladding layer was grown below the B /spl delta/-layer, further improved PVCR to 3.6 after 1 minute annealing at 825/spl deg/C. Results clearly show that, by introducing SiGe layers to clad the B delta-doping layer, the B diffusion is suppressed during the post growth annealing, which raises the thermal budget. A higher RTA temperature appears to be more effective in eliminating defects and results in a lower valley current and higher PVCR.\",\"PeriodicalId\":137839,\"journal\":{\"name\":\"Proceedings. IEEE Lester Eastman Conference on High Performance Devices\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-08-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. IEEE Lester Eastman Conference on High Performance Devices\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/LECHPD.2002.1146762\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. IEEE Lester Eastman Conference on High Performance Devices","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/LECHPD.2002.1146762","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
SiGe diffusion barriers for P-doped Si/SiGe resonant interband tunnel diodes
Si/SiGe resonant interband tunnel diodes (RITD) employing /spl delta/-doping spikes of P and B that demonstrate negative differential resistance (NDR) at room temperature are presented. Thin SiGe layers sandwiching the B /spl delta/-doping spike used to suppress B out-diffusion are discussed. Three structures were investigated in this study. Structure A, which employed a symmetrical 1 nm Si /4 nm Si/sub 0.6/Ge/sub 0.4//1 nm Si (1/4/1) spacer, showed a peak-to-valley current ratio (PVCR) of 2.7 after 1 minute annealing at 725/spl deg/C. Structure B with an asymmetrical 0 nm Si/4 nm Si/sub 0.6/Ge/sub 0.4//2 nm Si (0/4/2) spacer configuration showed a PVCR of 3.2 after 1 minute annealing at 800/spl deg/C. Structure C, which is the same as Structure B, except that a 1 nm Si/sub 0.6/Ge/sub 0.4/ cladding layer was grown below the B /spl delta/-layer, further improved PVCR to 3.6 after 1 minute annealing at 825/spl deg/C. Results clearly show that, by introducing SiGe layers to clad the B delta-doping layer, the B diffusion is suppressed during the post growth annealing, which raises the thermal budget. A higher RTA temperature appears to be more effective in eliminating defects and results in a lower valley current and higher PVCR.