{"title":"新的DRAM HCI鉴定方法强调重复存储器访问","authors":"P. Chia, Shi-Jie Wen, S. Baeg","doi":"10.1109/IIRW.2010.5706509","DOIUrl":null,"url":null,"abstract":"This paper proposes a new accelerated HCI reliability stress method specifically targeting DRAM components. The merit of this stress method is to provide the worst case design requirement of the data word access rate.","PeriodicalId":332664,"journal":{"name":"2010 IEEE International Integrated Reliability Workshop Final Report","volume":"40 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"New DRAM HCI qualification method emphasizing on repeated memory access\",\"authors\":\"P. Chia, Shi-Jie Wen, S. Baeg\",\"doi\":\"10.1109/IIRW.2010.5706509\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper proposes a new accelerated HCI reliability stress method specifically targeting DRAM components. The merit of this stress method is to provide the worst case design requirement of the data word access rate.\",\"PeriodicalId\":332664,\"journal\":{\"name\":\"2010 IEEE International Integrated Reliability Workshop Final Report\",\"volume\":\"40 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 IEEE International Integrated Reliability Workshop Final Report\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IIRW.2010.5706509\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 IEEE International Integrated Reliability Workshop Final Report","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IIRW.2010.5706509","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
New DRAM HCI qualification method emphasizing on repeated memory access
This paper proposes a new accelerated HCI reliability stress method specifically targeting DRAM components. The merit of this stress method is to provide the worst case design requirement of the data word access rate.