Reconfigurable Wireless Network-on-Chip with a Dynamic Medium Access Mechanism

Wireless interconnects have emerged as an energy-efficient interconnection paradigm for multicore chips with Networks-on-Chips (NoCs). As wireless interconnects have the unique advantage of eliminating the need to layout physical channels they provide an inherent opportunity for dynamic reconfiguration of the NoC architecture. Large temporal and spatial variability in traffic patterns is expected in large multicore chips and especially in future heterogeneous systems-on-chips integrating different kinds of cores such as CPUs, GPUs, ASICs and memory. By establishing on-demand wireless links in response to dynamically varying traffic patterns the data bandwidth and energy efficiency of NoC architectures can be improved compared to static architectures with the same raw bandwidth. We present a dynamic medium access mechanism that establishes wireless links depending on traffic requirements while reducing the overheads. Such an interconnection system incorporating wireless links in a NoC fabric will be better suited to address non-uniformity and temporal variations in traffic patterns which are expected in future large multicore chips.