具有内在线性的新电流模式惠斯通电桥拓扑

L. Safari, G. Barile, V. Stornelli, G. Ferri, A. Leoni
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引用次数: 19

摘要

本文提出了两种新的电流型惠斯通电桥(CMWB)拓扑结构。与其他CMWB拓扑不同,该电路基于两个第二代电压传送带(VCII)作为基本构建模块,两个nMOS晶体管作为可变电阻工作。两种电路的输出本质上都是r的线性函数,与先前报道的CMWB电路相比,所提出的拓扑结构具有几个优点。首先,它们在输出时不需要任何额外的电压缓冲,即产生的输出电压可以直接用于实际应用。其次,它们不使用任何无源电阻,而在其他cmwb中有多个接地和浮动电阻。第三,它们具有电子控制增益的能力,而不会对消耗的功率产生重大影响。为了验证上述理论,给出了采用0.35m CMOS工艺参数的PSpice仿真结果。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
New Current Mode Wheatstone Bridge Topologies with Intrinsic Linearity
In this paper two new topologies for current-mode Wheatstone bridge (CMWB) are presented. The circuits, unlike other CMWB topologies, are based on two second generation voltage conveyors (VCII) as basic building blocks and two nMOS transistors operating as variable resistor. The outputs of both circuits are intrinsically linear function of R. Compared to previously reported CMWB circuits, the proposed topologies offer several advantages. Firstly, they do not require any extra voltage buffer at output i.e., the produced output voltage can be directly used in practical applications. Secondly, they do not employ any passive resistor while there are multiple grounded and floating resistors in other CMWBs. Thirdly, they have the capability to electronically control the gain without a significant impact on consumed power. To confirm the proposed theory, PSpice simulation results using 0.35m CMOS technology parameters are presented.
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