{"title":"一种具有全对称负电容产生反馈回路和输入阻抗升压在线数字校准的斩波仪表放大器","authors":"Safaa A. Abdelfattah, A. Shrivastava, M. Onabajo","doi":"10.1109/MWSCAS.2019.8884858","DOIUrl":null,"url":null,"abstract":"A symmetric chopper instrumentation amplifier architecture with two identical 8-bit digitally programmable capacitor banks and online digital calibration block are presented. Designed for long-term brain signal monitoring applications, the feedback capacitor banks generate negative capacitance to cancel the input capacitance from electrode cables to boost the input impedance to above 2 GΩ at 10 Hz. These banks are controlled by an automatic digital background calibration unit that includes an oscillation prevention scheme to ensure stable operation. A chopping technique is introduced to enhance the noise performance of the instrumentation amplifier in combination with the capacitive feedback loop that also contains chopping switches. The instrumentation amplifier and online calibration blocks are designed in 0.13-µm BiCMOS technology with a 1.2V supply, consuming 115.9 µW and 176 nW, respectively. Simulations show that the amplifier has a 26.9 dB gain, 8.06 KHz bandwidth, 0.52 µV input-referred noise integrated from 0.1-100Hz, and −49.9 dB THD with 1mV peak-to-peak input. The core layout area of the calibration block is 2100 µm2.","PeriodicalId":287815,"journal":{"name":"2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Chopper Instrumentation Amplifier with Fully Symmetric Negative Capacitance Generation Feedback Loop and Online Digital Calibration for Input Impedance Boosting\",\"authors\":\"Safaa A. Abdelfattah, A. Shrivastava, M. Onabajo\",\"doi\":\"10.1109/MWSCAS.2019.8884858\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A symmetric chopper instrumentation amplifier architecture with two identical 8-bit digitally programmable capacitor banks and online digital calibration block are presented. Designed for long-term brain signal monitoring applications, the feedback capacitor banks generate negative capacitance to cancel the input capacitance from electrode cables to boost the input impedance to above 2 GΩ at 10 Hz. These banks are controlled by an automatic digital background calibration unit that includes an oscillation prevention scheme to ensure stable operation. A chopping technique is introduced to enhance the noise performance of the instrumentation amplifier in combination with the capacitive feedback loop that also contains chopping switches. The instrumentation amplifier and online calibration blocks are designed in 0.13-µm BiCMOS technology with a 1.2V supply, consuming 115.9 µW and 176 nW, respectively. Simulations show that the amplifier has a 26.9 dB gain, 8.06 KHz bandwidth, 0.52 µV input-referred noise integrated from 0.1-100Hz, and −49.9 dB THD with 1mV peak-to-peak input. The core layout area of the calibration block is 2100 µm2.\",\"PeriodicalId\":287815,\"journal\":{\"name\":\"2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)\",\"volume\":\"32 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MWSCAS.2019.8884858\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSCAS.2019.8884858","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Chopper Instrumentation Amplifier with Fully Symmetric Negative Capacitance Generation Feedback Loop and Online Digital Calibration for Input Impedance Boosting
A symmetric chopper instrumentation amplifier architecture with two identical 8-bit digitally programmable capacitor banks and online digital calibration block are presented. Designed for long-term brain signal monitoring applications, the feedback capacitor banks generate negative capacitance to cancel the input capacitance from electrode cables to boost the input impedance to above 2 GΩ at 10 Hz. These banks are controlled by an automatic digital background calibration unit that includes an oscillation prevention scheme to ensure stable operation. A chopping technique is introduced to enhance the noise performance of the instrumentation amplifier in combination with the capacitive feedback loop that also contains chopping switches. The instrumentation amplifier and online calibration blocks are designed in 0.13-µm BiCMOS technology with a 1.2V supply, consuming 115.9 µW and 176 nW, respectively. Simulations show that the amplifier has a 26.9 dB gain, 8.06 KHz bandwidth, 0.52 µV input-referred noise integrated from 0.1-100Hz, and −49.9 dB THD with 1mV peak-to-peak input. The core layout area of the calibration block is 2100 µm2.