基于90纳米CMOS技术的1.1-8.2 GHz调谐范围内的同相和正交输出DCO设计

E. R. Suraparaju, P. Arja, S. Ren
{"title":"基于90纳米CMOS技术的1.1-8.2 GHz调谐范围内的同相和正交输出DCO设计","authors":"E. R. Suraparaju, P. Arja, S. Ren","doi":"10.1109/MWSCAS.2015.7282171","DOIUrl":null,"url":null,"abstract":"This paper presents a high-frequency wide tuning range Digital Control Oscillator (DCO) with In-phase and Quadrature outputs designed using a 90nm CMOS process with 1.2 V power supply. The proposed design operates in the frequency range of 1.1-8.2GHz. The designed ring oscillator with digital control inputs attains high oscillation frequencies by applying negative delay inputs to the transistors in parallel to the conventional static CMOS inverter. The stage delay of the ring oscillator with the proposed design is less than the conventional static CMOS inverter and the skewed delay inverter cell. At 2.02GHz oscillation frequency, the measured phase noise is -90.43dBc/Hz at an offset of 1 MHz and -117.64dBc/Hz at an offset of 10MHz.","PeriodicalId":216613,"journal":{"name":"2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"A 1.1–8.2 GHz tuning range In-phase and Quadrature output DCO design in 90 nm CMOS technology\",\"authors\":\"E. R. Suraparaju, P. Arja, S. Ren\",\"doi\":\"10.1109/MWSCAS.2015.7282171\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a high-frequency wide tuning range Digital Control Oscillator (DCO) with In-phase and Quadrature outputs designed using a 90nm CMOS process with 1.2 V power supply. The proposed design operates in the frequency range of 1.1-8.2GHz. The designed ring oscillator with digital control inputs attains high oscillation frequencies by applying negative delay inputs to the transistors in parallel to the conventional static CMOS inverter. The stage delay of the ring oscillator with the proposed design is less than the conventional static CMOS inverter and the skewed delay inverter cell. At 2.02GHz oscillation frequency, the measured phase noise is -90.43dBc/Hz at an offset of 1 MHz and -117.64dBc/Hz at an offset of 10MHz.\",\"PeriodicalId\":216613,\"journal\":{\"name\":\"2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS)\",\"volume\":\"4 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MWSCAS.2015.7282171\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSCAS.2015.7282171","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6

摘要

本文提出了一种采用1.2 V电源,采用90nm CMOS工艺设计的高频宽调谐范围的同相和正交输出数字控制振荡器(DCO)。提出的设计工作在1.1-8.2GHz的频率范围内。所设计的环形振荡器具有数字控制输入,通过在传统静态CMOS逆变器并联的晶体管上施加负延迟输入来获得高振荡频率。环形振荡器的级延迟小于传统的静态CMOS逆变器和斜延时逆变器单元。在2.02GHz振荡频率下,测量到的相位噪声在偏移1mhz时为-90.43dBc/Hz,在偏移10MHz时为-117.64dBc/Hz。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A 1.1–8.2 GHz tuning range In-phase and Quadrature output DCO design in 90 nm CMOS technology
This paper presents a high-frequency wide tuning range Digital Control Oscillator (DCO) with In-phase and Quadrature outputs designed using a 90nm CMOS process with 1.2 V power supply. The proposed design operates in the frequency range of 1.1-8.2GHz. The designed ring oscillator with digital control inputs attains high oscillation frequencies by applying negative delay inputs to the transistors in parallel to the conventional static CMOS inverter. The stage delay of the ring oscillator with the proposed design is less than the conventional static CMOS inverter and the skewed delay inverter cell. At 2.02GHz oscillation frequency, the measured phase noise is -90.43dBc/Hz at an offset of 1 MHz and -117.64dBc/Hz at an offset of 10MHz.
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