{"title":"基于90纳米CMOS技术的1.1-8.2 GHz调谐范围内的同相和正交输出DCO设计","authors":"E. R. Suraparaju, P. Arja, S. Ren","doi":"10.1109/MWSCAS.2015.7282171","DOIUrl":null,"url":null,"abstract":"This paper presents a high-frequency wide tuning range Digital Control Oscillator (DCO) with In-phase and Quadrature outputs designed using a 90nm CMOS process with 1.2 V power supply. The proposed design operates in the frequency range of 1.1-8.2GHz. The designed ring oscillator with digital control inputs attains high oscillation frequencies by applying negative delay inputs to the transistors in parallel to the conventional static CMOS inverter. The stage delay of the ring oscillator with the proposed design is less than the conventional static CMOS inverter and the skewed delay inverter cell. At 2.02GHz oscillation frequency, the measured phase noise is -90.43dBc/Hz at an offset of 1 MHz and -117.64dBc/Hz at an offset of 10MHz.","PeriodicalId":216613,"journal":{"name":"2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"A 1.1–8.2 GHz tuning range In-phase and Quadrature output DCO design in 90 nm CMOS technology\",\"authors\":\"E. R. Suraparaju, P. Arja, S. Ren\",\"doi\":\"10.1109/MWSCAS.2015.7282171\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a high-frequency wide tuning range Digital Control Oscillator (DCO) with In-phase and Quadrature outputs designed using a 90nm CMOS process with 1.2 V power supply. The proposed design operates in the frequency range of 1.1-8.2GHz. The designed ring oscillator with digital control inputs attains high oscillation frequencies by applying negative delay inputs to the transistors in parallel to the conventional static CMOS inverter. The stage delay of the ring oscillator with the proposed design is less than the conventional static CMOS inverter and the skewed delay inverter cell. At 2.02GHz oscillation frequency, the measured phase noise is -90.43dBc/Hz at an offset of 1 MHz and -117.64dBc/Hz at an offset of 10MHz.\",\"PeriodicalId\":216613,\"journal\":{\"name\":\"2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS)\",\"volume\":\"4 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MWSCAS.2015.7282171\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSCAS.2015.7282171","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 1.1–8.2 GHz tuning range In-phase and Quadrature output DCO design in 90 nm CMOS technology
This paper presents a high-frequency wide tuning range Digital Control Oscillator (DCO) with In-phase and Quadrature outputs designed using a 90nm CMOS process with 1.2 V power supply. The proposed design operates in the frequency range of 1.1-8.2GHz. The designed ring oscillator with digital control inputs attains high oscillation frequencies by applying negative delay inputs to the transistors in parallel to the conventional static CMOS inverter. The stage delay of the ring oscillator with the proposed design is less than the conventional static CMOS inverter and the skewed delay inverter cell. At 2.02GHz oscillation frequency, the measured phase noise is -90.43dBc/Hz at an offset of 1 MHz and -117.64dBc/Hz at an offset of 10MHz.