{"title":"数字被动声呐的LOFAR和波束形成FPGA实现","authors":"Luis Castellanos, J. Aguilar, Miguel Alvarado","doi":"10.1109/ICEEE.2016.7751199","DOIUrl":null,"url":null,"abstract":"Two of the main signal processing methods in passive SONAR are beamforming and LOFAR. In this work, an implementation in FPGA of each method was made. For beamforming, the conventional delay and sum method was selected, with free choice of time integration. A conventional FFT of 1024 points was programmed for LOFAR. Test results show the viability to implement both methods in a Nexys 4 DDR FPGA board, under our architecture design specifications. The architecture implemented provides flexibility to interchange algorithms, ease to software re-programing and facilities to expand it, compared with a hardware implement architecture.","PeriodicalId":285464,"journal":{"name":"2016 13th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"A LOFAR and beamforming implementation in a FPGA for a digital passive SONAR\",\"authors\":\"Luis Castellanos, J. Aguilar, Miguel Alvarado\",\"doi\":\"10.1109/ICEEE.2016.7751199\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Two of the main signal processing methods in passive SONAR are beamforming and LOFAR. In this work, an implementation in FPGA of each method was made. For beamforming, the conventional delay and sum method was selected, with free choice of time integration. A conventional FFT of 1024 points was programmed for LOFAR. Test results show the viability to implement both methods in a Nexys 4 DDR FPGA board, under our architecture design specifications. The architecture implemented provides flexibility to interchange algorithms, ease to software re-programing and facilities to expand it, compared with a hardware implement architecture.\",\"PeriodicalId\":285464,\"journal\":{\"name\":\"2016 13th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE)\",\"volume\":\"41 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 13th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICEEE.2016.7751199\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 13th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICEEE.2016.7751199","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A LOFAR and beamforming implementation in a FPGA for a digital passive SONAR
Two of the main signal processing methods in passive SONAR are beamforming and LOFAR. In this work, an implementation in FPGA of each method was made. For beamforming, the conventional delay and sum method was selected, with free choice of time integration. A conventional FFT of 1024 points was programmed for LOFAR. Test results show the viability to implement both methods in a Nexys 4 DDR FPGA board, under our architecture design specifications. The architecture implemented provides flexibility to interchange algorithms, ease to software re-programing and facilities to expand it, compared with a hardware implement architecture.