单电子通管逻辑及其在二进制加法器上的应用

Y. Ono, Y. Takahashi
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引用次数: 16

摘要

提出了一种构造单电子晶体管(SET)电路的新型逻辑。该逻辑使用多门set作为通路晶体管。通过信号以小电压路由,因此set可以利用库仑阻断效应。当转移到其他电路的输入门时,它们在输出节点上升压。由于多门配置使我们能够仅使用一个器件实现异或功能,因此逻辑可以以紧凑的方式表示加法器的和位和进位。我们制作了一个基本的逻辑电路,并在电路中测试了set的基本操作。我们还介绍了一种基于该逻辑的多位二进制加法器,并讨论了电路的尺寸和速度。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Single-electron pass-transistor logic and its application to a binary adder
A new type of logic for constructing single-electron transistor (SET) circuits is proposed. The logic uses multigate SETs as pass transistors. The pass signals are routed with a small voltage so that the SETs can utilize Coulomb blockade effects. They are boosted at the output node when transferred to the input gates of other circuits. Since the multigate configuration enables us to implement XOR function using just one device, the logic can express sum- and carry-bits of an adder in a compact way. We have fabricated an elemental circuit of the logic and tested the basic operation of the SETs in the circuit. We also describe a multibit binary adder based on the logic, and discuss the circuit size and speed.
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