{"title":"实现二维可分分母数字滤波器的实时处理","authors":"A. Zilouchian, Ziqiang Huang","doi":"10.1109/SOUTHC.1995.516069","DOIUrl":null,"url":null,"abstract":"The general decomposition of separable in denominator 2-D discrete systems is reported. Several novel realizations for separable-in-denominator 2-D digital filters are presented. The number of required multipliers and additions for the implementation of these structures are reduced in comparison with the previously reported structures. The proposed realizations possess high degrees of parallelism/modularity which are suitable for VLSI design and implementation.","PeriodicalId":341055,"journal":{"name":"Proceedings of Southcon '95","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-03-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Implementation of 2-D separable-in-denominator digital filters for real-time processing\",\"authors\":\"A. Zilouchian, Ziqiang Huang\",\"doi\":\"10.1109/SOUTHC.1995.516069\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The general decomposition of separable in denominator 2-D discrete systems is reported. Several novel realizations for separable-in-denominator 2-D digital filters are presented. The number of required multipliers and additions for the implementation of these structures are reduced in comparison with the previously reported structures. The proposed realizations possess high degrees of parallelism/modularity which are suitable for VLSI design and implementation.\",\"PeriodicalId\":341055,\"journal\":{\"name\":\"Proceedings of Southcon '95\",\"volume\":\"4 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-03-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of Southcon '95\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOUTHC.1995.516069\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of Southcon '95","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOUTHC.1995.516069","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Implementation of 2-D separable-in-denominator digital filters for real-time processing
The general decomposition of separable in denominator 2-D discrete systems is reported. Several novel realizations for separable-in-denominator 2-D digital filters are presented. The number of required multipliers and additions for the implementation of these structures are reduced in comparison with the previously reported structures. The proposed realizations possess high degrees of parallelism/modularity which are suitable for VLSI design and implementation.
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