{"title":"双峰mos双极单片kitchip阵列","authors":"S. Combs, J. Meindl","doi":"10.1109/ISSCC.1977.1155745","DOIUrl":null,"url":null,"abstract":"COMBINED FET/BJT TECHNOLOGIES have recently generated increasing interest’ 5’. This paper will describe fully complementary, combined MOS-bipolar technology optimized for use in a monolithic Kitchip array of unconnected transistors, resistors, and MOS capacitors. The need for high performance integrated circuits is often overriden by their development cost and poor potential for volume production. The Kitchip represents a quick, cost-effective means for bringing IC technology to many of these applications. Prefabricated Kitchip ICs may be transformed into virtually any simple digital or linear circuit configuration by using a single customizing aluminum interconnect pattern. The underlying eight masks defining the Kitchip are never altered. Several key features distinguish the Kitchip from available IC arrays. A new process yields two self-aligned, low current optimized bimodal (MOS or bipolar) N and P type transistors, low on-resistance VMOS switches for signal multiplexing, ion-implanted low and high value resistors, and a low voltage JFET. The operational mode of any bimodal transistor is determined only by the metal interconnection pattern. Therefore, micropower CMOS and complementary bipolar logic can be realized simultaneously with high performance MOS or bipolar linear functions on the same chip. Surface aluminum, polysilicon cross-unders, and diffused tunnels provide three levels of interconnection permitting efficient device utilization. Compared to a standard six mask linear process, fabrication of the Kitchip requires an additional ion-implant, polysilicon deposition and an anisotropic etch. The dual N type bimodal transistor, Figure 1, o erates as either a bipolar NPN or aluminum. gate VMOS transistor . The bimodal transistor features an isolated source and buried layer drain VMOS with channel characteristics determined by a boron (P-) ion implantation and conventional downward diffusion. Additional arsenic (N’) and boron (P’) implants precisely define its NPN beta, fT, and breakdown voltage.","PeriodicalId":416313,"journal":{"name":"1977 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Bimodal MOS-bipolar monolithic kitchip array\",\"authors\":\"S. Combs, J. Meindl\",\"doi\":\"10.1109/ISSCC.1977.1155745\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"COMBINED FET/BJT TECHNOLOGIES have recently generated increasing interest’ 5’. This paper will describe fully complementary, combined MOS-bipolar technology optimized for use in a monolithic Kitchip array of unconnected transistors, resistors, and MOS capacitors. The need for high performance integrated circuits is often overriden by their development cost and poor potential for volume production. The Kitchip represents a quick, cost-effective means for bringing IC technology to many of these applications. Prefabricated Kitchip ICs may be transformed into virtually any simple digital or linear circuit configuration by using a single customizing aluminum interconnect pattern. The underlying eight masks defining the Kitchip are never altered. Several key features distinguish the Kitchip from available IC arrays. A new process yields two self-aligned, low current optimized bimodal (MOS or bipolar) N and P type transistors, low on-resistance VMOS switches for signal multiplexing, ion-implanted low and high value resistors, and a low voltage JFET. The operational mode of any bimodal transistor is determined only by the metal interconnection pattern. Therefore, micropower CMOS and complementary bipolar logic can be realized simultaneously with high performance MOS or bipolar linear functions on the same chip. Surface aluminum, polysilicon cross-unders, and diffused tunnels provide three levels of interconnection permitting efficient device utilization. Compared to a standard six mask linear process, fabrication of the Kitchip requires an additional ion-implant, polysilicon deposition and an anisotropic etch. The dual N type bimodal transistor, Figure 1, o erates as either a bipolar NPN or aluminum. gate VMOS transistor . The bimodal transistor features an isolated source and buried layer drain VMOS with channel characteristics determined by a boron (P-) ion implantation and conventional downward diffusion. Additional arsenic (N’) and boron (P’) implants precisely define its NPN beta, fT, and breakdown voltage.\",\"PeriodicalId\":416313,\"journal\":{\"name\":\"1977 IEEE International Solid-State Circuits Conference. Digest of Technical Papers\",\"volume\":\"2 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1977 IEEE International Solid-State Circuits Conference. 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COMBINED FET/BJT TECHNOLOGIES have recently generated increasing interest’ 5’. This paper will describe fully complementary, combined MOS-bipolar technology optimized for use in a monolithic Kitchip array of unconnected transistors, resistors, and MOS capacitors. The need for high performance integrated circuits is often overriden by their development cost and poor potential for volume production. The Kitchip represents a quick, cost-effective means for bringing IC technology to many of these applications. Prefabricated Kitchip ICs may be transformed into virtually any simple digital or linear circuit configuration by using a single customizing aluminum interconnect pattern. The underlying eight masks defining the Kitchip are never altered. Several key features distinguish the Kitchip from available IC arrays. A new process yields two self-aligned, low current optimized bimodal (MOS or bipolar) N and P type transistors, low on-resistance VMOS switches for signal multiplexing, ion-implanted low and high value resistors, and a low voltage JFET. The operational mode of any bimodal transistor is determined only by the metal interconnection pattern. Therefore, micropower CMOS and complementary bipolar logic can be realized simultaneously with high performance MOS or bipolar linear functions on the same chip. Surface aluminum, polysilicon cross-unders, and diffused tunnels provide three levels of interconnection permitting efficient device utilization. Compared to a standard six mask linear process, fabrication of the Kitchip requires an additional ion-implant, polysilicon deposition and an anisotropic etch. The dual N type bimodal transistor, Figure 1, o erates as either a bipolar NPN or aluminum. gate VMOS transistor . The bimodal transistor features an isolated source and buried layer drain VMOS with channel characteristics determined by a boron (P-) ion implantation and conventional downward diffusion. Additional arsenic (N’) and boron (P’) implants precisely define its NPN beta, fT, and breakdown voltage.