{"title":"基于可穿戴设备的动态局部重构癫痫检测系统的FPGA实现","authors":"Mohamed Fawzy, A. Hussien, H. Mostafa","doi":"10.1109/JAC-ECC56395.2022.10044028","DOIUrl":null,"url":null,"abstract":"Unplanned seizures are caused by a disorder in the central nervous system known as epilepsy. Although significant advancements have been made in the realm of non-EEG wearable devices, there is still much room for improvement in the field of EEG-based seizure detection and prediction using ML. The management of epilepsy has a lot of promise to be aided by non-invasive wearable technology. The suggested study intends to design and implement a support vector machine (SVM) classification-based epileptic seizure detection system based on various wearable devices. The proposed technique for detecting seizures accomplishes According to data for seizure detection, our system consistently achieves a sensitivity of 100% and an accuracy of 97%. High level MATLAB model creation is part of the design cycle. Despite the fact that high performance cannot be achieved with just one signal. Although a high performance detection system cannot achieve the requisite sensitivity and accuracy with a single signal, we presented various combining techniques. RTL modelling, design optimization, FPGA implementation, and functional verification are all included in the implementation cycle. The capacity of the FPGA’s partial dynamic reconfiguration is suggested for implementation in order to make better use of the available resources. Comparing the proposed implementation to relevant earlier work, it demonstrated improved utilization.","PeriodicalId":326002,"journal":{"name":"2022 10th International Japan-Africa Conference on Electronics, Communications, and Computations (JAC-ECC)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"FPGA Utilized Implementation of Epileptic Seizure Detection System Based on Wearable Devices using Dynamic Partial Reconfiguration\",\"authors\":\"Mohamed Fawzy, A. Hussien, H. Mostafa\",\"doi\":\"10.1109/JAC-ECC56395.2022.10044028\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Unplanned seizures are caused by a disorder in the central nervous system known as epilepsy. Although significant advancements have been made in the realm of non-EEG wearable devices, there is still much room for improvement in the field of EEG-based seizure detection and prediction using ML. The management of epilepsy has a lot of promise to be aided by non-invasive wearable technology. The suggested study intends to design and implement a support vector machine (SVM) classification-based epileptic seizure detection system based on various wearable devices. The proposed technique for detecting seizures accomplishes According to data for seizure detection, our system consistently achieves a sensitivity of 100% and an accuracy of 97%. High level MATLAB model creation is part of the design cycle. Despite the fact that high performance cannot be achieved with just one signal. Although a high performance detection system cannot achieve the requisite sensitivity and accuracy with a single signal, we presented various combining techniques. RTL modelling, design optimization, FPGA implementation, and functional verification are all included in the implementation cycle. The capacity of the FPGA’s partial dynamic reconfiguration is suggested for implementation in order to make better use of the available resources. Comparing the proposed implementation to relevant earlier work, it demonstrated improved utilization.\",\"PeriodicalId\":326002,\"journal\":{\"name\":\"2022 10th International Japan-Africa Conference on Electronics, Communications, and Computations (JAC-ECC)\",\"volume\":\"33 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-12-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 10th International Japan-Africa Conference on Electronics, Communications, and Computations (JAC-ECC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/JAC-ECC56395.2022.10044028\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 10th International Japan-Africa Conference on Electronics, Communications, and Computations (JAC-ECC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/JAC-ECC56395.2022.10044028","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
FPGA Utilized Implementation of Epileptic Seizure Detection System Based on Wearable Devices using Dynamic Partial Reconfiguration
Unplanned seizures are caused by a disorder in the central nervous system known as epilepsy. Although significant advancements have been made in the realm of non-EEG wearable devices, there is still much room for improvement in the field of EEG-based seizure detection and prediction using ML. The management of epilepsy has a lot of promise to be aided by non-invasive wearable technology. The suggested study intends to design and implement a support vector machine (SVM) classification-based epileptic seizure detection system based on various wearable devices. The proposed technique for detecting seizures accomplishes According to data for seizure detection, our system consistently achieves a sensitivity of 100% and an accuracy of 97%. High level MATLAB model creation is part of the design cycle. Despite the fact that high performance cannot be achieved with just one signal. Although a high performance detection system cannot achieve the requisite sensitivity and accuracy with a single signal, we presented various combining techniques. RTL modelling, design optimization, FPGA implementation, and functional verification are all included in the implementation cycle. The capacity of the FPGA’s partial dynamic reconfiguration is suggested for implementation in order to make better use of the available resources. Comparing the proposed implementation to relevant earlier work, it demonstrated improved utilization.