数值模拟,以协助芯片到晶圆混合键合工艺的发展

Sasi Kumar Tippabhotla, L. Ji, C. Choong
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引用次数: 0

摘要

芯片-晶圆混合键合(C2W-HB)工艺的发展是实现细间距(≤10 μm)铜互连直接键合以实现异质集成的关键。由于聚合物力学行为较为复杂,铜/聚合物-电介质直接键合的C2W-HB需要大量的实验努力、资源和时间来设计测试车辆和制定高质量和良率的工艺配方。在这项工作中,进行了数值模拟,以评估一种特殊情况下的键合进程,其中SiO2介电介质用于底部晶片,聚合物介电介质用于顶部晶片。由于这两种材料在热力学行为上有很大的不同,Cu/Cu界面的键合取决于周围SiO2(底部晶片)和介电聚合物(顶部晶片)界面的相对膨胀/收缩。我们的模拟有助于阐明键合界面的力学,并解释在实验运行中观察到的键合失败的原因。仿真结果表明,铜焊盘不适合这种结构,需要突出铜焊盘才能成功实现铜/铜直接键合。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Numerical Simulations to Assist Chip-to-Wafer Hybrid Bonding Process Development
Development of chip to wafer hybrid bonding (C2W-HB) process is essential to achieve direct bonding of fine pitch (≤ 10 μm) Cu interconnects for heterogeneous integration. As the polymer mechanical behavior is more complex, C2W-HB with direct bonding of Cu/polymer-dielectrics requires significant experimental efforts, resources, and time to design the test vehicles and formulate the process recipe for high quality and yield. In this work, numerical simulations are performed to evaluate the bonding progression for a special case where SiO2 dielectric is used for the bottom wafer and polymer dielectric is used for the top dies. As these two materials are quite different in their thermomechanical behaviour, bonding of the Cu/Cu interfaces depends on the relative expansion/contraction of the surrounding SiO2 (bottom wafer) and dielectric polymer (top die) interface. Our simulations help to elucidate the mechanics at the bonding interface and explain the reasons for the bonding failures observed in the experimental runs. The simulation results show that Cu pad dishing is not suitable for this configuration and protrusion of Cu pads is required to get a successful Cu/Cu direct bonding.
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