基于模拟退火算法和SPICE-PAC电路模拟器的集成电路性能优化

F. Durbin, J. Haussy, G. Berthiau, P. Siarry, W.M. Zuberek
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引用次数: 1

摘要

电路设计问题包括确定可接受的参数值(电阻器、电容器、晶体管几何形状……),这些参数值允许电路满足各种用户给定的操作标准(直流消耗、交流带宽、瞬态上升时间等)。这个任务相当于一个多维和/或多目标优化问题:n变量函数必须在超矩形域中最小化;最终可以指定相等和/或不等式约束。作者提出了一种有效的算法,基于模拟退火对一定数量的p变量子问题的重复应用,其中p>
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Integrated circuit performance optimization with simulated annealing algorithm and SPICE-PAC circuit simulator
The circuit design problem consists in determining acceptable parameter values (resistors, capacitors, transistor geometries . . .) which allow the circuit to meet various user given operational criteria (DC consumption, AC bandwidth, transient rise times, etc.). This task is equivalent to a multidimensional and/or multi objective optimization problem: n-variables functions have to be minimized in an hyperrectangular domain: equality and/or inequality constraints can be eventually specified. The authors propose an efficient algorithm, based on the repeated application of simulated annealing to a certain number of p-variables sub problems, with p<>
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