基于验证板上芯片阻抗测定的测量方法

B. Gowrish, A. Basu
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引用次数: 0

摘要

本文提出并描述了一种简单而稳健的芯片去嵌入转换阻抗测定方法。该方法完全基于测量,不依赖于三维电磁模拟器。通过对工作频率为2.45 GHz的无线电的芯片阻抗测量,验证了该方法的有效性。在大多数实际应用中,所提出的方法测量的芯片阻抗与芯片设计者获得的模拟阻抗相当接近。所提出的基于测量方法的阻抗误差在15%以内,幅度误差为13.7%,相位误差为12.2%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Measurement based chip impedance determination on validation board
In this paper, a simple and robust methodology for chip impedance determination by de-embedding transition is proposed and described. The methodology is solely based on measurement with no dependency on 3D Electro-Magnetic simulator. The proposed method has been verified by measuring chip impedance of a radio operating at 2.45 GHz. The measured chip impedance from the proposed methodology matches reasonably close to the simulated impedance obtained from chip designer for most practical applications. The impedance error in the proposed measurement based methodology is within 15 %, with magnitude error being 13.7 % and phase error of 12.2 %.
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