{"title":"1.0 V GHz范围0.13 /spl mu/m CMOS频率合成器","authors":"Lizhong Sun, D. Nelson","doi":"10.1109/CICC.2001.929792","DOIUrl":null,"url":null,"abstract":"A 0.13 /spl mu/m CMOS user programmable PLL frequency synthesizer is designed to operate at low voltage (1.0-1.8 V) and cover a wide range of operating frequencies for multiple applications. This design incorporates low voltage circuits and a digital auto-trimming scheme which calibrates the center frequency of the VCO and limits the VCO gain variation for stability and reduced jitter over all process and temperature conditions. The maximum frequency is 1.25 GHz and 2.85 GHz at 1.0 V and 1.8 V supply voltages, respectively. Period jitter at 1 GHz output is 4.9 ps (r.m.s.) and 45.8 ps (p-p) with a power consumption of 3.9 mW for 1.0 V supply.","PeriodicalId":101717,"journal":{"name":"Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-05-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"A 1.0 V GHz range 0.13 /spl mu/m CMOS frequency synthesizer\",\"authors\":\"Lizhong Sun, D. Nelson\",\"doi\":\"10.1109/CICC.2001.929792\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 0.13 /spl mu/m CMOS user programmable PLL frequency synthesizer is designed to operate at low voltage (1.0-1.8 V) and cover a wide range of operating frequencies for multiple applications. This design incorporates low voltage circuits and a digital auto-trimming scheme which calibrates the center frequency of the VCO and limits the VCO gain variation for stability and reduced jitter over all process and temperature conditions. The maximum frequency is 1.25 GHz and 2.85 GHz at 1.0 V and 1.8 V supply voltages, respectively. Period jitter at 1 GHz output is 4.9 ps (r.m.s.) and 45.8 ps (p-p) with a power consumption of 3.9 mW for 1.0 V supply.\",\"PeriodicalId\":101717,\"journal\":{\"name\":\"Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169)\",\"volume\":\"10 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2001-05-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.2001.929792\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2001.929792","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 1.0 V GHz range 0.13 /spl mu/m CMOS frequency synthesizer
A 0.13 /spl mu/m CMOS user programmable PLL frequency synthesizer is designed to operate at low voltage (1.0-1.8 V) and cover a wide range of operating frequencies for multiple applications. This design incorporates low voltage circuits and a digital auto-trimming scheme which calibrates the center frequency of the VCO and limits the VCO gain variation for stability and reduced jitter over all process and temperature conditions. The maximum frequency is 1.25 GHz and 2.85 GHz at 1.0 V and 1.8 V supply voltages, respectively. Period jitter at 1 GHz output is 4.9 ps (r.m.s.) and 45.8 ps (p-p) with a power consumption of 3.9 mW for 1.0 V supply.