脑- pet脉冲的高效混合插值与基线恢复

S. Qaisar
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引用次数: 0

摘要

介绍了一种新型的偏移补偿数字基线恢复器(BLR)和一种原始的混合插值器的设计和元件级结构。它允许减少在正电子发射断层扫描(PET)脉冲读出期间发生的修改的影响。如果不进行处理,这些伪影会降低扫描仪的性能,如灵敏度和分辨率。BLR补偿了PET脉冲的偏移量。然后,定位这些脉冲的相关部分。然后,使用混合插值器对信号的定位部分进行重采样。这是通过级联优化加权最小二乘插值器(WLSI)和简化线性插值器(SLI)来构建的。给出了WLSI系数的调节过程以及BLR和插补器模块的评价。将所提出的混合插值器与经典插值器的计算复杂度进行了比较。这些模块采用超高速集成电路硬件描述语言(VHDL)实现,并在现场可编程门阵列(FPGA)上进行合成。通过实验验证了该系统的功能。结果显示了显著的计算增益以及足够的双极偏移的动态恢复,以及相对于计算复杂的传统等效的有用和准确的时间分辨率的改进。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Computationally Efficient Hybrid Interpolation and Baseline Restoration of the Brain-PET Pulses
The design and component level architectures of a novel offset compensated digital baseline restorer (BLR) and an original hybrid interpolator are described. It allows diminishing the effect of modifications occurring during the readout of Positron Emission Tomography (PET) pulses. Without treatment, such artifacts can result in a reduction in the scanner’s performance, such as its sensitivity and resolution. The BLR recompenses the offset of PET pulses. Afterward, the pertinent parts of these pulses are located. Onward, the located portion of the signal is resampled by using a hybrid interpolator. This is constructed by cascading an optimized weighted least-square interpolator (WLSI) and a Simplified Linear Interpolator (SLI). The regulation processes for the WLSI coefficients and evaluation of the BLR and the interpolator modules are presented. The proposed hybrid interpolator’s computational complexity is compared with classic counterparts. These modules are implemented in Very High-Speed Integrated Circuits Hardware Description Language (VHDL) and synthesized on a Field Programmable Gate Array (FPGA). The functionality of the system is validated with an experimental setup. Results reveal notable computational gain along with adequate dynamic restitution of the bipolar offsets besides a useful and accurate improvement of the temporal resolution relative to the computationally complex conventional equivalents.
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