高温对UTBB SOI nmosfet衬底效应的影响

2014 29th Symposium on Microelectronics Technology and Devices (SBMicro) Pub Date : 2014-10-30 DOI:10.1109/SBMICRO.2014.6940132

V. Itocazu, V. Sonnenberg, E. Simoen, C. Claeys, J. Martino

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引用次数: 5

摘要

分析了温度对短通道超薄体和盒式(UTBB) SOI nmosfet的衬底效应的影响。本研究在室温至200°C范围内进行。对理论模型进行了应用，结果与实验和仿真数据吻合较好。数据显示漏极电流的弯曲作为背极电压的函数是由于基片电位下降，当接平面不存在时。地平面降低了衬底电位降，但增加了栅极和埋藏氧化物上的电位降。在高温下，带GP和不带GP的VGB之间的最大差值减小。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Influence of high temperature on substrate effect of UTBB SOI nMOSFETs

An analysis of the temperature influence on the substrate effect of short channel Ultra Thin Body and BOX (UTBB) SOI nMOSFETs with and without Ground Plane (GP) implantation is presented. This study was done from room temperature up to 200°C. The theoretical model was applied and the results are in agreement with experimental and simulation data. The data shows a kink in the drain current as a function of back-gate voltage due to the substrate potential drop when the ground plane is not present. The ground plane reduces the substrate potential drop, but increases the potential drop over the gate and buried oxides. The maximum difference between VGB with and without GP decreases for high temperature.

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2014 29th Symposium on Microelectronics Technology and Devices (SBMicro)

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