{"title":"带FIR预测器的稳定四阶δ - σ调制器","authors":"Toshiyuki Okanoto, Y. Maruyama, A. Yukawa","doi":"10.1109/ESSCIRC.1992.5468428","DOIUrl":null,"url":null,"abstract":"A novel approach for a stable high-order delta-sigma modulator is presented. The modulator provides 16 bit resolution at 20kHz bandwidth using 4th-order noise shaping structure at an oversampling ratio of 64. The modulation loop is completely stabilized by an FIR prediction technique. The architecture inherently has less sensitivity to component mismatch. The total hardware is much the same as the noise shaping integrators.","PeriodicalId":242379,"journal":{"name":"ESSCIRC '92: Eighteenth European Solid-State Circuits conference","volume":"79 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A Stable 4th-Order Delta-Sigma Modulator with an FIR predictor\",\"authors\":\"Toshiyuki Okanoto, Y. Maruyama, A. Yukawa\",\"doi\":\"10.1109/ESSCIRC.1992.5468428\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A novel approach for a stable high-order delta-sigma modulator is presented. The modulator provides 16 bit resolution at 20kHz bandwidth using 4th-order noise shaping structure at an oversampling ratio of 64. The modulation loop is completely stabilized by an FIR prediction technique. The architecture inherently has less sensitivity to component mismatch. The total hardware is much the same as the noise shaping integrators.\",\"PeriodicalId\":242379,\"journal\":{\"name\":\"ESSCIRC '92: Eighteenth European Solid-State Circuits conference\",\"volume\":\"79 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1992-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ESSCIRC '92: Eighteenth European Solid-State Circuits conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIRC.1992.5468428\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC '92: Eighteenth European Solid-State Circuits conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.1992.5468428","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Stable 4th-Order Delta-Sigma Modulator with an FIR predictor
A novel approach for a stable high-order delta-sigma modulator is presented. The modulator provides 16 bit resolution at 20kHz bandwidth using 4th-order noise shaping structure at an oversampling ratio of 64. The modulation loop is completely stabilized by an FIR prediction technique. The architecture inherently has less sensitivity to component mismatch. The total hardware is much the same as the noise shaping integrators.
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