{"title":"带有片上LDO的d类CMOS DCO","authors":"Luca Fanori, T. Mattsson, P. Andreani","doi":"10.1109/ESSCIRC.2014.6942090","DOIUrl":null,"url":null,"abstract":"This paper presents the co-design of a class-D digitally-controlled oscillator (DCO) and a low-dropout voltage regulator (LDO) generating the supply voltage for the DCO. Despite the high intrinsic supply pushing of the class-D oscillator topology, the LDO noise has only a very marginal impact on the DCO phase noise. The class-D DCO and LDO have been integrated in a 65 nm CMOS process without any thick top metal layer. The oscillation frequency is tunable between 3.0 GHz and 4.3 GHz, for a tuning range of 36%, with a fine frequency step below 3kHz and a fine frequency range of 10 MHz (both measured at 3GHz). Drawing 9.0 mA from 0.4V (corresponding to an unregulated supply voltage of 0.6 V), the phase noise is -145.5 dBc/Hz at a 10 MHz offset from a 3.0GHz carrier. The resulting FoM is 189.5 dBc/Hz, and varies less than 1dB across the tuning range. The FoM increases to above 190 dBc/Hz when the regulated supply voltage is 0.5 V.","PeriodicalId":202377,"journal":{"name":"ESSCIRC 2014 - 40th European Solid State Circuits Conference (ESSCIRC)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"18","resultStr":"{\"title\":\"A Class-D CMOS DCO with an on-chip LDO\",\"authors\":\"Luca Fanori, T. Mattsson, P. Andreani\",\"doi\":\"10.1109/ESSCIRC.2014.6942090\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the co-design of a class-D digitally-controlled oscillator (DCO) and a low-dropout voltage regulator (LDO) generating the supply voltage for the DCO. Despite the high intrinsic supply pushing of the class-D oscillator topology, the LDO noise has only a very marginal impact on the DCO phase noise. The class-D DCO and LDO have been integrated in a 65 nm CMOS process without any thick top metal layer. The oscillation frequency is tunable between 3.0 GHz and 4.3 GHz, for a tuning range of 36%, with a fine frequency step below 3kHz and a fine frequency range of 10 MHz (both measured at 3GHz). Drawing 9.0 mA from 0.4V (corresponding to an unregulated supply voltage of 0.6 V), the phase noise is -145.5 dBc/Hz at a 10 MHz offset from a 3.0GHz carrier. The resulting FoM is 189.5 dBc/Hz, and varies less than 1dB across the tuning range. The FoM increases to above 190 dBc/Hz when the regulated supply voltage is 0.5 V.\",\"PeriodicalId\":202377,\"journal\":{\"name\":\"ESSCIRC 2014 - 40th European Solid State Circuits Conference (ESSCIRC)\",\"volume\":\"32 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-11-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"18\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ESSCIRC 2014 - 40th European Solid State Circuits Conference (ESSCIRC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIRC.2014.6942090\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC 2014 - 40th European Solid State Circuits Conference (ESSCIRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2014.6942090","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This paper presents the co-design of a class-D digitally-controlled oscillator (DCO) and a low-dropout voltage regulator (LDO) generating the supply voltage for the DCO. Despite the high intrinsic supply pushing of the class-D oscillator topology, the LDO noise has only a very marginal impact on the DCO phase noise. The class-D DCO and LDO have been integrated in a 65 nm CMOS process without any thick top metal layer. The oscillation frequency is tunable between 3.0 GHz and 4.3 GHz, for a tuning range of 36%, with a fine frequency step below 3kHz and a fine frequency range of 10 MHz (both measured at 3GHz). Drawing 9.0 mA from 0.4V (corresponding to an unregulated supply voltage of 0.6 V), the phase noise is -145.5 dBc/Hz at a 10 MHz offset from a 3.0GHz carrier. The resulting FoM is 189.5 dBc/Hz, and varies less than 1dB across the tuning range. The FoM increases to above 190 dBc/Hz when the regulated supply voltage is 0.5 V.