降低偏置灵敏度的CMOS带隙基准

ESSCIRC '88: Fourteenth European Solid-State Circuits Conference Pub Date : 1988-09-01 DOI:10.1109/ESSCIRC.1988.5468341

Eric Holle

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引用次数: 3

摘要

讨论了一种基于带隙基准原理实现CMOS工艺中电压基准的新电路技术。参考电压可以自由选择，只要它大于或等于硅带隙电压。该电路既降低了MOS放大器偏置的灵敏度，又减少了电阻器占用的芯片面积。电路技术的有效性已在硅片上得到验证。

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A CMOS Bandgap Reference with Reduced Offset Sensitivity

A new circuit technique to realize a voltage reference in a CMOS process based on the bandgap reference principle is discussed. The reference voltage can be chosen freely as long as it is greater than or equal to the silicon bandgap voltage. The circuit combines a reduced sensitivity for MOS amplifier offset with a reduction of chip area occupied by resistors. The validity of the circuit technique has been demonstrated on silicon.

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ESSCIRC '88: Fourteenth European Solid-State Circuits Conference

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