M. Specht, H. Reisinger, M. Stadele, F. Hofmann, A. Gschwandtner, E. Landgraf, R. J. Luyken, T. Schulz, J. Hartwich, L. Dreeskornfeld, W. Rosner, J. Kretz, L. Risch
{"title":"Al/sub 2/O/sub 3/介质新型电荷捕获存储器的保留时间","authors":"M. Specht, H. Reisinger, M. Stadele, F. Hofmann, A. Gschwandtner, E. Landgraf, R. J. Luyken, T. Schulz, J. Hartwich, L. Dreeskornfeld, W. Rosner, J. Kretz, L. Risch","doi":"10.1109/ESSDERC.2003.1256834","DOIUrl":null,"url":null,"abstract":"Replacing oxide-nitride-oxide (ONO) dielectrics in charge trapping memories such as SONOS (silicon/ONO/silicon) and NROM (nitrided read only memory) by high-k materials potentially offers improved scaling properties of the devices. In particular, a high dielectric constant of at least one of the three layers allows one to reduce the total equivalent oxide thickness (EOT) thus achieving the same programming electric field as in ONO stacks at reduced voltage. In this study, we evaluate the retention time of charge trapping memories using Al/sub 2/O/sub 3/ as a trapping dielectric and as a control gate dielectric. We find sufficiently large shifts of the threshold voltage allowing for retention times of more than ten years for the Al/sub 2/O/sub 3/ charge trapping memories. High-temperature annealed, polycrystalline layers are found to be more useful than amorphous layers annealed at 400-600/spl deg/C due to better retention time, smaller EOT and flat band shifts and a smaller amount of fixed interface charges.","PeriodicalId":350452,"journal":{"name":"ESSDERC '03. 33rd Conference on European Solid-State Device Research, 2003.","volume":"19 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Retention time of novel charge trapping memories using Al/sub 2/O/sub 3/ dielectrics\",\"authors\":\"M. Specht, H. Reisinger, M. Stadele, F. Hofmann, A. Gschwandtner, E. Landgraf, R. J. Luyken, T. Schulz, J. Hartwich, L. Dreeskornfeld, W. Rosner, J. Kretz, L. Risch\",\"doi\":\"10.1109/ESSDERC.2003.1256834\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Replacing oxide-nitride-oxide (ONO) dielectrics in charge trapping memories such as SONOS (silicon/ONO/silicon) and NROM (nitrided read only memory) by high-k materials potentially offers improved scaling properties of the devices. In particular, a high dielectric constant of at least one of the three layers allows one to reduce the total equivalent oxide thickness (EOT) thus achieving the same programming electric field as in ONO stacks at reduced voltage. In this study, we evaluate the retention time of charge trapping memories using Al/sub 2/O/sub 3/ as a trapping dielectric and as a control gate dielectric. We find sufficiently large shifts of the threshold voltage allowing for retention times of more than ten years for the Al/sub 2/O/sub 3/ charge trapping memories. High-temperature annealed, polycrystalline layers are found to be more useful than amorphous layers annealed at 400-600/spl deg/C due to better retention time, smaller EOT and flat band shifts and a smaller amount of fixed interface charges.\",\"PeriodicalId\":350452,\"journal\":{\"name\":\"ESSDERC '03. 33rd Conference on European Solid-State Device Research, 2003.\",\"volume\":\"19 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-09-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ESSDERC '03. 33rd Conference on European Solid-State Device Research, 2003.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSDERC.2003.1256834\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSDERC '03. 33rd Conference on European Solid-State Device Research, 2003.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSDERC.2003.1256834","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Retention time of novel charge trapping memories using Al/sub 2/O/sub 3/ dielectrics
Replacing oxide-nitride-oxide (ONO) dielectrics in charge trapping memories such as SONOS (silicon/ONO/silicon) and NROM (nitrided read only memory) by high-k materials potentially offers improved scaling properties of the devices. In particular, a high dielectric constant of at least one of the three layers allows one to reduce the total equivalent oxide thickness (EOT) thus achieving the same programming electric field as in ONO stacks at reduced voltage. In this study, we evaluate the retention time of charge trapping memories using Al/sub 2/O/sub 3/ as a trapping dielectric and as a control gate dielectric. We find sufficiently large shifts of the threshold voltage allowing for retention times of more than ten years for the Al/sub 2/O/sub 3/ charge trapping memories. High-temperature annealed, polycrystalline layers are found to be more useful than amorphous layers annealed at 400-600/spl deg/C due to better retention time, smaller EOT and flat band shifts and a smaller amount of fixed interface charges.