超浅p/sup +/结形成过程中SiO/sub / 2/ Si界面上硼的偏析和堆积模型的研究

A. Shima, T. Jinbo, J. Ushio, J. Oh, K. Ono, M. Oshima, N. Natsuaki
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引用次数: 0

摘要

我们使用XPS和Backside SIMS测量技术,定量地研究了硼如何分离到表面的区域,以及是什么控制了这种现象。我们发现,与平衡偏析相反,硼的堆积主要在界面Si侧的0.6 nm内,并且封装类型没有区别。这也表明硼的堆积主要在硅面,并暗示这种偏析的主要因素是硅面的存在。从器件制造的角度来看,这一结果似乎对侧壁的制造是有用的。硼的堆积也可能发生在间隙态。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Investigation of a model for the segregation and pile-up of boron at the SiO/sub 2//Si interface during the formation of ultrashallow p/sup +/ junctions
We have quantitatively investigated how boron segregates to regions dose to the surface, and what controls this phenomenon, using XPS and Backside SIMS measurement techniques. We found that, on the contrary to the equilibrium segregation, the pileup of boron are mainly on and within 0.6 nm of the Si side of the interface, and that there is no difference between the kind of encapsulation. This also suggests that the pileup of boron is mainly on the Si side, and implies that the main factor in this segregation is the existence of the Si surface. From the viewpoint of device fabrication, this result seems to be useful in terms of the fabrication of side-walls. The possibility for boron pileup to occur in the interstitial state was also shown.
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