{"title":"设计物理不可克隆函数时环形振荡器波形质量的电容效应","authors":"Z. Zulfikar, N. Soin, S. W. Muhamad Hatta","doi":"10.1109/SMELEC.2018.8481291","DOIUrl":null,"url":null,"abstract":"The paper discusses the effect of capacitance changes on the ring oscillator to its output wave for a physically unclonable function (PUF) application. The wave quality generated by the ring oscillator (RO) will largely determine the response of PUF. We have analyzed the resulting RO waveforms to determine the capacitor values and the ideal number of RO stages. The peak voltage analysis of the capacitance change has been done with the help of the Mentor Graphics software package. High performance PTM model transistors (16nm, 22nm, 32nm, and 45nm technologies) are selected to form the RO circuit. Based on the results of the study, we recommend that the number of RO stages is at least 5. Then, we also recommend the ideal capacitance value as a compromise between quality and delay. The capacitances should be 0.7fF, 0.8fF, 0.9fF, and 1fF for 16nm, 22nm, 32nm, and 45nm technologies, respectively.","PeriodicalId":110608,"journal":{"name":"2018 IEEE International Conference on Semiconductor Electronics (ICSE)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Capacitance Effects of Ring Oscillator's Waveform Quality in Designing Physically Unclonable Functions\",\"authors\":\"Z. Zulfikar, N. Soin, S. W. Muhamad Hatta\",\"doi\":\"10.1109/SMELEC.2018.8481291\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The paper discusses the effect of capacitance changes on the ring oscillator to its output wave for a physically unclonable function (PUF) application. The wave quality generated by the ring oscillator (RO) will largely determine the response of PUF. We have analyzed the resulting RO waveforms to determine the capacitor values and the ideal number of RO stages. The peak voltage analysis of the capacitance change has been done with the help of the Mentor Graphics software package. High performance PTM model transistors (16nm, 22nm, 32nm, and 45nm technologies) are selected to form the RO circuit. Based on the results of the study, we recommend that the number of RO stages is at least 5. Then, we also recommend the ideal capacitance value as a compromise between quality and delay. The capacitances should be 0.7fF, 0.8fF, 0.9fF, and 1fF for 16nm, 22nm, 32nm, and 45nm technologies, respectively.\",\"PeriodicalId\":110608,\"journal\":{\"name\":\"2018 IEEE International Conference on Semiconductor Electronics (ICSE)\",\"volume\":\"42 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 IEEE International Conference on Semiconductor Electronics (ICSE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SMELEC.2018.8481291\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE International Conference on Semiconductor Electronics (ICSE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SMELEC.2018.8481291","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Capacitance Effects of Ring Oscillator's Waveform Quality in Designing Physically Unclonable Functions
The paper discusses the effect of capacitance changes on the ring oscillator to its output wave for a physically unclonable function (PUF) application. The wave quality generated by the ring oscillator (RO) will largely determine the response of PUF. We have analyzed the resulting RO waveforms to determine the capacitor values and the ideal number of RO stages. The peak voltage analysis of the capacitance change has been done with the help of the Mentor Graphics software package. High performance PTM model transistors (16nm, 22nm, 32nm, and 45nm technologies) are selected to form the RO circuit. Based on the results of the study, we recommend that the number of RO stages is at least 5. Then, we also recommend the ideal capacitance value as a compromise between quality and delay. The capacitances should be 0.7fF, 0.8fF, 0.9fF, and 1fF for 16nm, 22nm, 32nm, and 45nm technologies, respectively.