采用软可编程逻辑的多芯片高速GaAs RISC处理器的设计验证与仿真

Proceedings of Eighth International Application Specific Integrated Circuits Conference Pub Date : 1995-09-18 DOI:10.1109/ASIC.1995.580706

S. Carlough, S. Steidl, A. N. Airapetian, A. Garg, C. Maier, P. Campbell, H.J. Greub, J. McDonald

{"title":"采用软可编程逻辑的多芯片高速GaAs RISC处理器的设计验证与仿真","authors":"S. Carlough, S. Steidl, A. N. Airapetian, A. Garg, C. Maier, P. Campbell, H.J. Greub, J. McDonald","doi":"10.1109/ASIC.1995.580706","DOIUrl":null,"url":null,"abstract":"Soft-programmable logic is increasingly used to emulate and verify CMOS designs before fabrication. The F-RISC emulator uses this technology to emulate and verify a multichip GaAs RISC processor. An essential part of the F-RISC emulator is the mapping of the differential CML GaAs libraries to the Xilinx FPGA libraries. The emulator helped to detect several design errors.","PeriodicalId":307095,"journal":{"name":"Proceedings of Eighth International Application Specific Integrated Circuits Conference","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design verification and emulation of a multichip high-speed GaAs RISC processor using soft-programmable logic\",\"authors\":\"S. Carlough, S. Steidl, A. N. Airapetian, A. Garg, C. Maier, P. Campbell, H.J. Greub, J. McDonald\",\"doi\":\"10.1109/ASIC.1995.580706\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Soft-programmable logic is increasingly used to emulate and verify CMOS designs before fabrication. The F-RISC emulator uses this technology to emulate and verify a multichip GaAs RISC processor. An essential part of the F-RISC emulator is the mapping of the differential CML GaAs libraries to the Xilinx FPGA libraries. The emulator helped to detect several design errors.\",\"PeriodicalId\":307095,\"journal\":{\"name\":\"Proceedings of Eighth International Application Specific Integrated Circuits Conference\",\"volume\":\"31 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-09-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of Eighth International Application Specific Integrated Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASIC.1995.580706\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of Eighth International Application Specific Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASIC.1995.580706","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

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摘要

软可编程逻辑越来越多地用于模拟和验证CMOS设计在制造之前。F-RISC模拟器使用该技术来模拟和验证多芯片GaAs RISC处理器。F-RISC模拟器的一个重要部分是将差分CML GaAs库映射到Xilinx FPGA库。仿真器帮助检测了几个设计错误。

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Design verification and emulation of a multichip high-speed GaAs RISC processor using soft-programmable logic

Soft-programmable logic is increasingly used to emulate and verify CMOS designs before fabrication. The F-RISC emulator uses this technology to emulate and verify a multichip GaAs RISC processor. An essential part of the F-RISC emulator is the mapping of the differential CML GaAs libraries to the Xilinx FPGA libraries. The emulator helped to detect several design errors.

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Proceedings of Eighth International Application Specific Integrated Circuits Conference

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