Y. Nagase, T. Matsuda, M. Kimura, Taketoshi Matsumoto, H. Kobayashi
{"title":"使用多晶硅薄膜晶体管的多输入NAND电路和使用NAND电路的设置复位触发器电路","authors":"Y. Nagase, T. Matsuda, M. Kimura, Taketoshi Matsumoto, H. Kobayashi","doi":"10.1109/IMFEDK.2014.6867075","DOIUrl":null,"url":null,"abstract":"We have evaluated multiple-input NAND circuits using polycrystalline silicon thin-film transistors and found that the output pulse became degraded for the 3-input NAND circuit. Moreover, we have fabricated a set-reset flip-flop (SR-FF) circuit using the 2-input NAND circuits and confirmed that the SR-FF circuit operated correctly.","PeriodicalId":202416,"journal":{"name":"2014 IEEE International Meeting for Future of Electron Devices, Kansai (IMFEDK)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Multiple-input NAND cirucit using polycrystalline silicon thin-film transistors and set-reset flip-flop circuit using the NAND circuits\",\"authors\":\"Y. Nagase, T. Matsuda, M. Kimura, Taketoshi Matsumoto, H. Kobayashi\",\"doi\":\"10.1109/IMFEDK.2014.6867075\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We have evaluated multiple-input NAND circuits using polycrystalline silicon thin-film transistors and found that the output pulse became degraded for the 3-input NAND circuit. Moreover, we have fabricated a set-reset flip-flop (SR-FF) circuit using the 2-input NAND circuits and confirmed that the SR-FF circuit operated correctly.\",\"PeriodicalId\":202416,\"journal\":{\"name\":\"2014 IEEE International Meeting for Future of Electron Devices, Kansai (IMFEDK)\",\"volume\":\"30 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-06-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 IEEE International Meeting for Future of Electron Devices, Kansai (IMFEDK)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IMFEDK.2014.6867075\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 IEEE International Meeting for Future of Electron Devices, Kansai (IMFEDK)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMFEDK.2014.6867075","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Multiple-input NAND cirucit using polycrystalline silicon thin-film transistors and set-reset flip-flop circuit using the NAND circuits
We have evaluated multiple-input NAND circuits using polycrystalline silicon thin-film transistors and found that the output pulse became degraded for the 3-input NAND circuit. Moreover, we have fabricated a set-reset flip-flop (SR-FF) circuit using the 2-input NAND circuits and confirmed that the SR-FF circuit operated correctly.