低功耗VLSI应用的节能空间编码技术

J. Ravindra, N. Chittarvu, M. Srinivas
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引用次数: 11

摘要

在深亚微米技术(DSM)中,最小化总线上的传输延迟和功耗是片上系统(SOC)设计中最重要的设计目标。特别是总线上导线之间的耦合效应,会引起串扰延迟、噪声和功耗等严重问题。大多数的研究都集中在最小化功耗或最小化串扰延迟上。在本文中,作者提出了一种高效节能的片上总线数据传输技术,并使用spec95基准测试套件评估了我们的技术的有效性。作者表明,我们的技术比在数据总线上的未编码数据传输节能35%
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Energy Efficient Spatial Coding Technique for Low Power VLSI Applications
In deep-submicron technology (DSM), minimizing the propagation delay and power dissipation on buses is the most important design objective in system-on-chip (SOC) design. In particular, the coupling effects between wires on the bus that can cause serious problems such as cross-talk delay, noise and power dissipation. Most of the researchers have concentrated either on minimizing the power dissipation or minimizing crosstalk delay. In this paper, the authors propose a technique for energy efficient data transmission for on-chip buses and evaluate the effectiveness of our technique by using SPEC 95 benchmarks suit. The authors show that our technique achieves 35% of energy savings over the un-encoded data transmission on the data bus
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