{"title":"纳米级CMOS近阈值电压设计","authors":"V. De","doi":"10.7873/DATE.2013.134","DOIUrl":null,"url":null,"abstract":"Near-Threshold Voltage (NTV) operation of a CMOS design is defined as the voltage-frequency operating point where the energy consumed per compute operation (pJ/op) reaches a minimum, or the energy efficiency (Mops/Watt) peaks. Typically, this operating voltage is above the nominal threshold voltage of the transistor. The peak efficiency is achieved by a balance of switching energy and idle or leakage energy.","PeriodicalId":205976,"journal":{"name":"Design, Automation and Test in Europe","volume":"19 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-03-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"Near-threshold voltage design in nanoscale CMOS\",\"authors\":\"V. De\",\"doi\":\"10.7873/DATE.2013.134\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Near-Threshold Voltage (NTV) operation of a CMOS design is defined as the voltage-frequency operating point where the energy consumed per compute operation (pJ/op) reaches a minimum, or the energy efficiency (Mops/Watt) peaks. Typically, this operating voltage is above the nominal threshold voltage of the transistor. The peak efficiency is achieved by a balance of switching energy and idle or leakage energy.\",\"PeriodicalId\":205976,\"journal\":{\"name\":\"Design, Automation and Test in Europe\",\"volume\":\"19 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-03-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Design, Automation and Test in Europe\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.7873/DATE.2013.134\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Design, Automation and Test in Europe","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.7873/DATE.2013.134","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Near-Threshold Voltage (NTV) operation of a CMOS design is defined as the voltage-frequency operating point where the energy consumed per compute operation (pJ/op) reaches a minimum, or the energy efficiency (Mops/Watt) peaks. Typically, this operating voltage is above the nominal threshold voltage of the transistor. The peak efficiency is achieved by a balance of switching energy and idle or leakage energy.
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