{"title":"基于LTPO混合薄膜晶体管集成的内存计算单元设计","authors":"Liankai Zheng, Yu Huang, Xiaojun Guo","doi":"10.1109/IFETC53656.2022.9948500","DOIUrl":null,"url":null,"abstract":"This paper presents a compute-in-memory (CIM) cell design based on the low-temperature polycrystalline-silicon (LTPS) oxide (LTPO) hybrid thin-film transistor (TFT) technology. The weight of the cell is quantized to 4 bits though 4 LTPS TFTs of different width-to-length ratios. The weights are able to be maintained for long-term operation with ultra-low leakage amorphous indium-gallium-zinc-oxide (a-IGZO) TFT switches. A CIM array is designed to implement a 3-layer MLP neural network for MNIST dataset recognition, which can achieve recognition accuracy of 98% even at a 5% relative threshold voltage fluctuation of the LTPS TFT.","PeriodicalId":289035,"journal":{"name":"2022 IEEE International Flexible Electronics Technology Conference (IFETC)","volume":"79 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-08-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Computing-in-Memory Cell Design based on LTPO Hybrid Thin Film Transistor Integration\",\"authors\":\"Liankai Zheng, Yu Huang, Xiaojun Guo\",\"doi\":\"10.1109/IFETC53656.2022.9948500\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a compute-in-memory (CIM) cell design based on the low-temperature polycrystalline-silicon (LTPS) oxide (LTPO) hybrid thin-film transistor (TFT) technology. The weight of the cell is quantized to 4 bits though 4 LTPS TFTs of different width-to-length ratios. The weights are able to be maintained for long-term operation with ultra-low leakage amorphous indium-gallium-zinc-oxide (a-IGZO) TFT switches. A CIM array is designed to implement a 3-layer MLP neural network for MNIST dataset recognition, which can achieve recognition accuracy of 98% even at a 5% relative threshold voltage fluctuation of the LTPS TFT.\",\"PeriodicalId\":289035,\"journal\":{\"name\":\"2022 IEEE International Flexible Electronics Technology Conference (IFETC)\",\"volume\":\"79 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-08-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE International Flexible Electronics Technology Conference (IFETC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IFETC53656.2022.9948500\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE International Flexible Electronics Technology Conference (IFETC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IFETC53656.2022.9948500","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Computing-in-Memory Cell Design based on LTPO Hybrid Thin Film Transistor Integration
This paper presents a compute-in-memory (CIM) cell design based on the low-temperature polycrystalline-silicon (LTPS) oxide (LTPO) hybrid thin-film transistor (TFT) technology. The weight of the cell is quantized to 4 bits though 4 LTPS TFTs of different width-to-length ratios. The weights are able to be maintained for long-term operation with ultra-low leakage amorphous indium-gallium-zinc-oxide (a-IGZO) TFT switches. A CIM array is designed to implement a 3-layer MLP neural network for MNIST dataset recognition, which can achieve recognition accuracy of 98% even at a 5% relative threshold voltage fluctuation of the LTPS TFT.
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