M. Dresselhaus, Y. Lin, G. Dresselhaus, X. Sun, Z. Zhang, S. Cronin, T. Koga, J. Ying
{"title":"一维和二维热电材料的研究进展","authors":"M. Dresselhaus, Y. Lin, G. Dresselhaus, X. Sun, Z. Zhang, S. Cronin, T. Koga, J. Ying","doi":"10.1109/ICT.1999.843342","DOIUrl":null,"url":null,"abstract":"Recent advances in our understanding of 1D and 2D thermoelectric materials in the form of quantum wires (1D) and quantum wells (2D) are reviewed, with emphasis given to the physical mechanisms responsible for the enhanced thermoelectric figure of merit (ZT) in these low dimensional systems. Starting with 2D superlattices, progress in demonstrating proof-of-principle in the PbTe/Pb/sub 1-x/Eu/sub x/Te and Si/Si/sub 1-x/Ge/sub x/ systems is presented. The concept of carrier pocket engineering regarding improved thermoelectric performance for the whole superlattice Z/sub 3D/T, including both the quantum well and the barrier region, is reviewed. Particular attention is given to recent results obtained for 1D bismuth nanowire arrays and for individual Bi nanowires.","PeriodicalId":253439,"journal":{"name":"Eighteenth International Conference on Thermoelectrics. Proceedings, ICT'99 (Cat. No.99TH8407)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-08-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"16","resultStr":"{\"title\":\"Advances in 1D and 2D thermoelectric materials\",\"authors\":\"M. Dresselhaus, Y. Lin, G. Dresselhaus, X. Sun, Z. Zhang, S. Cronin, T. Koga, J. Ying\",\"doi\":\"10.1109/ICT.1999.843342\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Recent advances in our understanding of 1D and 2D thermoelectric materials in the form of quantum wires (1D) and quantum wells (2D) are reviewed, with emphasis given to the physical mechanisms responsible for the enhanced thermoelectric figure of merit (ZT) in these low dimensional systems. Starting with 2D superlattices, progress in demonstrating proof-of-principle in the PbTe/Pb/sub 1-x/Eu/sub x/Te and Si/Si/sub 1-x/Ge/sub x/ systems is presented. The concept of carrier pocket engineering regarding improved thermoelectric performance for the whole superlattice Z/sub 3D/T, including both the quantum well and the barrier region, is reviewed. Particular attention is given to recent results obtained for 1D bismuth nanowire arrays and for individual Bi nanowires.\",\"PeriodicalId\":253439,\"journal\":{\"name\":\"Eighteenth International Conference on Thermoelectrics. Proceedings, ICT'99 (Cat. No.99TH8407)\",\"volume\":\"29 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1999-08-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"16\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Eighteenth International Conference on Thermoelectrics. Proceedings, ICT'99 (Cat. No.99TH8407)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICT.1999.843342\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Eighteenth International Conference on Thermoelectrics. Proceedings, ICT'99 (Cat. No.99TH8407)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICT.1999.843342","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Recent advances in our understanding of 1D and 2D thermoelectric materials in the form of quantum wires (1D) and quantum wells (2D) are reviewed, with emphasis given to the physical mechanisms responsible for the enhanced thermoelectric figure of merit (ZT) in these low dimensional systems. Starting with 2D superlattices, progress in demonstrating proof-of-principle in the PbTe/Pb/sub 1-x/Eu/sub x/Te and Si/Si/sub 1-x/Ge/sub x/ systems is presented. The concept of carrier pocket engineering regarding improved thermoelectric performance for the whole superlattice Z/sub 3D/T, including both the quantum well and the barrier region, is reviewed. Particular attention is given to recent results obtained for 1D bismuth nanowire arrays and for individual Bi nanowires.