{"title":"利用地球移动距离变换的时钟网格合成方法","authors":"Y. Teng, B. Taskin","doi":"10.1109/ICCD.2012.6378627","DOIUrl":null,"url":null,"abstract":"A novel clock mesh generation method is proposed based on the EMDg (Earth Mover's Distance under transformations) algorithm. A bottom-up approach is adopted in creating local-level tree clusters to drive the generation of a regional-level uniform clock mesh. The EMDg method incrementally moves the regional-level uniform clock mesh closer to the register cluster roots in order to reduce the total stub wirelength. Post-EMDg mesh reduction, the redundant mesh wires are eliminated from the initial uniform mesh in order to reduce the mesh wirelength, preserving the stub wire connections and the integrity of the clock mesh. The optimization results show that the proposed method can achieve an average total wirelength saving of 20.1% and power savings of 12.2% on a suite of ISCAS'89 benchmark circuits compared to the previous clock mesh generation methods.","PeriodicalId":313428,"journal":{"name":"2012 IEEE 30th International Conference on Computer Design (ICCD)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-09-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Clock mesh synthesis method using the Earth Mover's Distance under transformations\",\"authors\":\"Y. Teng, B. Taskin\",\"doi\":\"10.1109/ICCD.2012.6378627\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A novel clock mesh generation method is proposed based on the EMDg (Earth Mover's Distance under transformations) algorithm. A bottom-up approach is adopted in creating local-level tree clusters to drive the generation of a regional-level uniform clock mesh. The EMDg method incrementally moves the regional-level uniform clock mesh closer to the register cluster roots in order to reduce the total stub wirelength. Post-EMDg mesh reduction, the redundant mesh wires are eliminated from the initial uniform mesh in order to reduce the mesh wirelength, preserving the stub wire connections and the integrity of the clock mesh. The optimization results show that the proposed method can achieve an average total wirelength saving of 20.1% and power savings of 12.2% on a suite of ISCAS'89 benchmark circuits compared to the previous clock mesh generation methods.\",\"PeriodicalId\":313428,\"journal\":{\"name\":\"2012 IEEE 30th International Conference on Computer Design (ICCD)\",\"volume\":\"31 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-09-30\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 IEEE 30th International Conference on Computer Design (ICCD)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCD.2012.6378627\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE 30th International Conference on Computer Design (ICCD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCD.2012.6378627","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
摘要
提出了一种基于EMDg (Earth Mover’s Distance under transformations)算法的时钟网格生成方法。采用自底向上的方法创建局域级树簇,以驱动区域级均匀时钟网格的生成。EMDg方法增量移动区域级均匀时钟网格更接近寄存器簇根,以减少总存根长度。后emdg网格减少,从最初的均匀网格中消除冗余的网格线,以减少网格长度,保留短线连接和时钟网格的完整性。优化结果表明,在一套ISCAS’89基准电路上,与之前的时钟网格生成方法相比,所提出的方法可以实现平均总带宽节省20.1%,功耗节省12.2%。
Clock mesh synthesis method using the Earth Mover's Distance under transformations
A novel clock mesh generation method is proposed based on the EMDg (Earth Mover's Distance under transformations) algorithm. A bottom-up approach is adopted in creating local-level tree clusters to drive the generation of a regional-level uniform clock mesh. The EMDg method incrementally moves the regional-level uniform clock mesh closer to the register cluster roots in order to reduce the total stub wirelength. Post-EMDg mesh reduction, the redundant mesh wires are eliminated from the initial uniform mesh in order to reduce the mesh wirelength, preserving the stub wire connections and the integrity of the clock mesh. The optimization results show that the proposed method can achieve an average total wirelength saving of 20.1% and power savings of 12.2% on a suite of ISCAS'89 benchmark circuits compared to the previous clock mesh generation methods.