近似加法器应用的不精确计算

NAECON 2014 - IEEE National Aerospace and Electronics Conference Pub Date : 2014-06-24 DOI:10.1109/NAECON.2014.7045768

Christopher I. Allen, D. Langley, J. Lyke

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引用次数: 7

摘要

本文分析了一种非精确n位纹波进位加法器结构。结果表明，在保持均方根误差为16%的情况下，几个近似加法器的功率降低了30%。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Inexact computing with approximate adder application

This paper presents an analysis of an inexact N-bit ripple carry adder architecture. Results show that a 30 percent power reduction is achieved for several approximate adders while maintaining a root-mean square error of 16 percent.

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NAECON 2014 - IEEE National Aerospace and Electronics Conference

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