S. Pyo, Jun-Sung Kim, Jung-Han Kim, Hyuntaek Jung, T. Song, Cheol-Ha Lee, Gyu-Hong Kim, Young-Keun Lee, Kee Sup Kim
{"title":"采用45纳米CMOS技术的0.65V嵌入式SDRAM,具有智能升压和电源管理功能","authors":"S. Pyo, Jun-Sung Kim, Jung-Han Kim, Hyuntaek Jung, T. Song, Cheol-Ha Lee, Gyu-Hong Kim, Young-Keun Lee, Kee Sup Kim","doi":"10.1109/CICC.2012.6330622","DOIUrl":null,"url":null,"abstract":"In this paper, an embedded SDRAM (eSDRAM) with smart boosting and power management (SB-PM) scheme for low power operation has been designed. SB-PM scheme decreases 40.3% of dynamic power and 69.1% of standby power consumption with ECC compared with the conventional scheme. A 266-Mb eSDRAM with SB-PM scheme is designed in a 45-nm CMOS technology showing 51.2-mW dynamic power and 2.05mW standby power consumption at VDD=0.65V and 85°C.","PeriodicalId":130434,"journal":{"name":"Proceedings of the IEEE 2012 Custom Integrated Circuits Conference","volume":"28 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A 0.65V embedded SDRAM with smart boosting and power management in a 45nm CMOS technology\",\"authors\":\"S. Pyo, Jun-Sung Kim, Jung-Han Kim, Hyuntaek Jung, T. Song, Cheol-Ha Lee, Gyu-Hong Kim, Young-Keun Lee, Kee Sup Kim\",\"doi\":\"10.1109/CICC.2012.6330622\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, an embedded SDRAM (eSDRAM) with smart boosting and power management (SB-PM) scheme for low power operation has been designed. SB-PM scheme decreases 40.3% of dynamic power and 69.1% of standby power consumption with ECC compared with the conventional scheme. A 266-Mb eSDRAM with SB-PM scheme is designed in a 45-nm CMOS technology showing 51.2-mW dynamic power and 2.05mW standby power consumption at VDD=0.65V and 85°C.\",\"PeriodicalId\":130434,\"journal\":{\"name\":\"Proceedings of the IEEE 2012 Custom Integrated Circuits Conference\",\"volume\":\"28 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-10-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the IEEE 2012 Custom Integrated Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.2012.6330622\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 2012 Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2012.6330622","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 0.65V embedded SDRAM with smart boosting and power management in a 45nm CMOS technology
In this paper, an embedded SDRAM (eSDRAM) with smart boosting and power management (SB-PM) scheme for low power operation has been designed. SB-PM scheme decreases 40.3% of dynamic power and 69.1% of standby power consumption with ECC compared with the conventional scheme. A 266-Mb eSDRAM with SB-PM scheme is designed in a 45-nm CMOS technology showing 51.2-mW dynamic power and 2.05mW standby power consumption at VDD=0.65V and 85°C.