薄(~ 10 nm) HfO2铁电FDSOI NCFET在降低功耗的情况下提高数字电路性能的潜力

2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS) Pub Date : 2018-03-01 DOI:10.1109/ULIS.2018.8354775

S. Qureshi, S. Mehrotra

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引用次数: 1

摘要

提出了一种使用薄(~ 10 nm) HfO2 PGP FDSOI NCFET基栅极的仿真研究。该研究已在金属栅极长度为20nm，电源电压为0.5 V至0.9 V的器件上进行。所研究的电路是三级环形振荡器、NAND-2和no -2门。研究表明，与基于FDSOI MOSFET的栅极相比，基于HfO2 FDSOI nfet栅极的性能显著提高，功耗降低了- 66%。与基于FDSOI MOSFET的基准栅极相比，基于HfO2 FDSOI nfet栅极的功率延迟积显著降低(~ 24%)。本文还讨论了增加扇入和扇出对逻辑门性能的影响。

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Potential of thin (∼10 nm) HfO2 ferroelectric FDSOI NCFET for performance enhancement in digital circuits at reduced power consumption

A simulation study using thin (∼10 nm) HfO2 PGP FDSOI NCFET based gates is presented. The study has been performed on devices having 20 nm metal gate length with supply voltage varying from 0.5 V to 0.9 V. The circuits studied were 3-stage ring oscillator, NAND-2 and NOR-2 gates. The study showed significant enhancement in the performance in HfO2 FDSOI NCFET based gates at reduced power consumption which is −66% when compared to that of FDSOI MOSFET based gates. The power-delay product of HfO2 FDSOI NCFET based gates was found to be significantly lower (∼24%) in comparison to baseline FDSOI MOSFET based gates. The effect of increasing fan-in and fan-out on the performance of logic gates has also been discussed in the paper.

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2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS)

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