M. Murayama, Y. Matsuda, K. Yoshida, H. Ooka, T. Otani, S. Toyoda, F. Tsubokura, A. Aso
{"title":"一个177k门150ps CMOS SOG与1856 I/O缓冲器","authors":"M. Murayama, Y. Matsuda, K. Yoshida, H. Ooka, T. Otani, S. Toyoda, F. Tsubokura, A. Aso","doi":"10.1109/CICC.1989.56715","DOIUrl":null,"url":null,"abstract":"A CMOS SOG (sea-of-gates) that contains 177 K raw gates, corresponding to 1.4 M transistors and having a delay time of as fast as 150 ps, has been developed in a 0.8-μm CMOS technology. The SOG can accommodate a RAM of either a high-density type with 64 K bits maximum, a high-speed type with 6-ns access time, or a mixture of both. The SOG contains 1856 I/O buffers in the peripheral area of the die, providing high flexibility for interfacing circuits to the SOG","PeriodicalId":165054,"journal":{"name":"1989 Proceedings of the IEEE Custom Integrated Circuits Conference","volume":"20 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-05-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A 177 K gate 150 PS CMOS SOG with 1856 I/O buffers\",\"authors\":\"M. Murayama, Y. Matsuda, K. Yoshida, H. Ooka, T. Otani, S. Toyoda, F. Tsubokura, A. Aso\",\"doi\":\"10.1109/CICC.1989.56715\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A CMOS SOG (sea-of-gates) that contains 177 K raw gates, corresponding to 1.4 M transistors and having a delay time of as fast as 150 ps, has been developed in a 0.8-μm CMOS technology. The SOG can accommodate a RAM of either a high-density type with 64 K bits maximum, a high-speed type with 6-ns access time, or a mixture of both. The SOG contains 1856 I/O buffers in the peripheral area of the die, providing high flexibility for interfacing circuits to the SOG\",\"PeriodicalId\":165054,\"journal\":{\"name\":\"1989 Proceedings of the IEEE Custom Integrated Circuits Conference\",\"volume\":\"20 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1989-05-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1989 Proceedings of the IEEE Custom Integrated Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.1989.56715\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1989 Proceedings of the IEEE Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.1989.56715","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 177 K gate 150 PS CMOS SOG with 1856 I/O buffers
A CMOS SOG (sea-of-gates) that contains 177 K raw gates, corresponding to 1.4 M transistors and having a delay time of as fast as 150 ps, has been developed in a 0.8-μm CMOS technology. The SOG can accommodate a RAM of either a high-density type with 64 K bits maximum, a high-speed type with 6-ns access time, or a mixture of both. The SOG contains 1856 I/O buffers in the peripheral area of the die, providing high flexibility for interfacing circuits to the SOG
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