深度卷积神经网络的流水线节能硬件加速

2019 IEEE International Conference on Design & Test of Integrated Micro & Nano-Systems (DTS) Pub Date : 2019-04-01 DOI:10.1109/DTSS.2019.8915295

Hmidi Alaeddine, Malek Jihene

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引用次数: 0

摘要

本文提出了一种新的卷积神经网络加速器结构。建议的解决方案是流水线的，它通过利用滑动窗口图像来减少带传递内存。此外，它可以在卷积步幅水平上在线重新配置。该方案的工作频率相当于280 mhz，性能为3.36 GMAC。能耗为475兆瓦。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A Pipelined Energy-efficient Hardware Accelaration for Deep Convolutional Neural Networks

In this paper, a new architecture of an accelerator of a convolutional neural network is proposed. The suggested solution is pipelined and it reduces the band passing memory through the exploitation of sliding window images. Moreover, it is reconfigurable online at a convolution stride level. This proposal operates at a frequency equivalent to 280 mhz and offers a performance of 3.36 GMAC. The energy consumption is 475mw.

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2019 IEEE International Conference on Design & Test of Integrated Micro & Nano-Systems (DTS)

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