使用硬件描述语言进行建模和仿真

J. Armstrong
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引用次数: 2

摘要

讨论了HDL建模与仿真在设计过程中的作用。建模过程包括模型和模型测试开发。通过仿真来确保模型的正确性。能够创建复杂系统的HDL模型是设计当今系统的必要条件,但是模型创建和验证本身就是一项复杂的任务。智能地使用工具是简化这项工作的必要条件。硬件描述语言(如VHDL)有一组强大的结构,但是建模者在编码时必须牢记模型的应用程序。在整个设计周期内可重复使用的模型试验台和仿真效率对于有效的模型测试至关重要。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Modeling and simulation with hardware description languages
The role of HDL modeling and simulation in the design process is discussed. The modeling process involves both model and model test development. Simulation is used to ensure model correctness. Being able to create HDL models of complex systems is imperative in designing today's systems, but model creation and validation is itself a complex task. Intelligent use of tools is necessary to simplify of this effort. Hardware description languages such as VHDL have a powerful set of constructs, but the modeler must keep in mind the model's application when coding it. Model test benches that can be reused throughout the design cycle and simulation efficiency are critical to effective model testing.
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