Reduction of leakage energy in low level caches

Recently, leakage energy in cache memories is growing. In past studies, techniques that reduce leakage energy in cache memories by partial inactivation, or techniques that find cache areas to be inactivated were proposed. In this paper, we discuss temporal locality in multi-level caches. Then we propose a technique that reduces leakage energy in low level (L2) caches by using a dynamic optimization system. In the proposed technique, the dynamic optimization system first detects load/store instructions that exhibit no temporal locality in low level (L2) caches. The detected load/store instructions are then replaced with new instructions. When the new instructions cause a miss in L2 caches, the requested block is loaded only on L1 caches and the corresponding cache block in L2 caches is turned off. (Inclusion property is supposed.) The evaluation results for 19 programs in SPEC CPU 2000 benchmarks showed that the proposed technique could reduce leakage energy in L2 cache memories by up to 94.04%, or by 52.10% on average.