Volterra系列在集成电路缓冲模型中的应用

M. Telescu, I. Stievano, F. Canavero, N. Tanguy
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引用次数: 8

摘要

本文提出了一种基于volterra的数字集成电路I/O缓冲器行为建模方法。虽然这种技术比以前的技术在准确性上略有提高,但它的主要优点是更大程度的通用性。由于建模方法较少依赖于设备的性质,并且更容易扩展以包含多个输入的效果,因此人们可能希望更好地应对先进技术的挑战。所提出的模型可以仅从设备端口瞬态响应中获得,并且可以在任何仿真环境中轻松实现,包括基于spice的电路描述软件。两个说明性的例子总结了本文。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
An application of Volterra series to IC buffer models
This paper presents a Volterra-based method of behavioral modeling for the I/O buffers of digital ICs. While this technique brings a slight improvement in accuracy over previous ones, its main strength is a greater degree of generality. With a modeling approach less dependent on the nature of the devices and more easily extendable to include the effects of multiple inputs one may hope better meet the challenges of advancing technology. The proposed models can be obtained from device port transient responses only and can be easily implemented in any simulation environment, including SPICE-based circuit description software. Two illustrative examples conclude the paper.
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